coreboot-kgpe-d16/src/mainboard/google/asurada/reset.c

/* SPDX-License-Identifier: GPL-2.0-only */

#include <gpio.h>
#include <reset.h>

#include "gpio.h"

void do_board_reset(void)
{
	gpio_output(GPIO_RESET, 1);
}
mb/google/asurada: Add new MT8192 mainboard "Asurada" The placeholder functions and build rules for generating a minimal firmware to run on MT8192 SOC based mainboard "Asurada". Signed-off-by: CK Hu <ck.hu@mediatek.com> Change-Id: Ic7c8bc8a4bba40d1b511823e09945be52198b247 Reviewed-on: https://review.coreboot.org/c/coreboot/+/43963 Reviewed-by: Yu-Ping Wu <yupingso@google.com> Reviewed-by: Hung-Te Lin <hungte@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> 2020-05-13 04:45:08 +02:00			`/* SPDX-License-Identifier: GPL-2.0-only */`

mb/google/asurada: Implement HW reset function TEST=call do_board_reset() manually. Signed-off-by: Yidi Lin <yidi.lin@mediatek.com> Change-Id: I355f71e731f1045cd80a133cd31cf4d55f14d91f Reviewed-on: https://review.coreboot.org/c/coreboot/+/49237 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com> 2021-01-08 12:50:26 +01:00			`#include <gpio.h>`
mb/google/asurada: Add new MT8192 mainboard "Asurada" The placeholder functions and build rules for generating a minimal firmware to run on MT8192 SOC based mainboard "Asurada". Signed-off-by: CK Hu <ck.hu@mediatek.com> Change-Id: Ic7c8bc8a4bba40d1b511823e09945be52198b247 Reviewed-on: https://review.coreboot.org/c/coreboot/+/43963 Reviewed-by: Yu-Ping Wu <yupingso@google.com> Reviewed-by: Hung-Te Lin <hungte@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> 2020-05-13 04:45:08 +02:00			`#include <reset.h>`

mb/google/asurada: Implement HW reset function TEST=call do_board_reset() manually. Signed-off-by: Yidi Lin <yidi.lin@mediatek.com> Change-Id: I355f71e731f1045cd80a133cd31cf4d55f14d91f Reviewed-on: https://review.coreboot.org/c/coreboot/+/49237 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com> 2021-01-08 12:50:26 +01:00			`#include "gpio.h"`

mb/google/asurada: Add new MT8192 mainboard "Asurada" The placeholder functions and build rules for generating a minimal firmware to run on MT8192 SOC based mainboard "Asurada". Signed-off-by: CK Hu <ck.hu@mediatek.com> Change-Id: Ic7c8bc8a4bba40d1b511823e09945be52198b247 Reviewed-on: https://review.coreboot.org/c/coreboot/+/43963 Reviewed-by: Yu-Ping Wu <yupingso@google.com> Reviewed-by: Hung-Te Lin <hungte@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> 2020-05-13 04:45:08 +02:00			`void do_board_reset(void)`
			`{`
mb/google/asurada: Implement HW reset function TEST=call do_board_reset() manually. Signed-off-by: Yidi Lin <yidi.lin@mediatek.com> Change-Id: I355f71e731f1045cd80a133cd31cf4d55f14d91f Reviewed-on: https://review.coreboot.org/c/coreboot/+/49237 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com> 2021-01-08 12:50:26 +01:00			`gpio_output(GPIO_RESET, 1);`
mb/google/asurada: Add new MT8192 mainboard "Asurada" The placeholder functions and build rules for generating a minimal firmware to run on MT8192 SOC based mainboard "Asurada". Signed-off-by: CK Hu <ck.hu@mediatek.com> Change-Id: Ic7c8bc8a4bba40d1b511823e09945be52198b247 Reviewed-on: https://review.coreboot.org/c/coreboot/+/43963 Reviewed-by: Yu-Ping Wu <yupingso@google.com> Reviewed-by: Hung-Te Lin <hungte@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> 2020-05-13 04:45:08 +02:00			`}`