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coreboot-kgpe-d16/src/acpi/Makefile.inc

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src/acpi: Update license headers to SPDX While I was working on updating the headers to move copyrights into the AUTHORS file, I got a request to switch to SPDX headers as well. Linux has moved completely to SPDX headers, which are easier to maintain, have good definitions, are very short, and can be checked automatically. This is completely unlike our current header situation. Signed-off-by: Martin Roth <martin@coreboot.org> Change-Id: Ie86d34f7fa7bf7434ad8a38aa1eadcfece7124b3 Reviewed-on: https://review.coreboot.org/c/coreboot/+/36176 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-by: David Hendricks <david.hendricks@gmail.com>
2019-09-24 02:23:02 +02:00
# SPDX-License-Identifier: GPL-2.0-only
acpi: Move ACPI table support out of arch/x86 (1/5) This change moves all ACPI table support in coreboot currently living under arch/x86 into common code to make it architecture independent. ACPI table generation is not really tied to any architecture and hence it makes sense to move this to its own directory. In order to make it easier to review, this change is being split into multiple CLs. This is change 1/5 which moves .c files from arch/x86 to acpi/. The only acpi files that are still retained under arch/x86 are: a. acpi_s3.c: This doesn't really deal with ACPI tables. Also, there are some assumptions in there about SMM which will have to be resolved if this file needs to be moved to common code. b. acpi_bert_storage.c/bert_storage.h: This file is currently written specifically with x86 in mind. So, not moving the file for now. Motivation for this change: Not all stages on Picasso SoC are targeted for the same architecture. For example, verstage (if runs before bootblock) will be targeted for non-x86. This makes it difficult to add device tree to verstage which would be required to get to SoC configs from the tree. This is because the device tree on x86 platforms currently contains a lot of devices that require ACPI related enums and structs (like acpi_gpio, acpi_pld, acpi_dp and so on). Hence, this change removes all ACPI table support out of arch/x86. BUG=b:155428745 Change-Id: Icc6b793c52c86483a8c52e0555619e36869a869e Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/40930 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2020-05-01 04:13:47 +02:00
ifeq ($(CONFIG_HAVE_ACPI_TABLES),y)
ramstage-y += acpi.c
ramstage-y += acpigen.c
dptf: Add support for generation of Active Policies This change adds support for generating the different pieces of DPTF Active Policies. This includes the Active Relationship Table, in addition to _ACx methods. BUG=b:143539650 TEST=compiles Change-Id: Iea0ccbd96f88d0f3a8f2c77a7d0f3a284e5ee463 Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41885 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com> Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
2020-05-29 21:56:37 +02:00
ramstage-y += acpigen_dptf.c
acpi: Move ACPI table support out of arch/x86 (1/5) This change moves all ACPI table support in coreboot currently living under arch/x86 into common code to make it architecture independent. ACPI table generation is not really tied to any architecture and hence it makes sense to move this to its own directory. In order to make it easier to review, this change is being split into multiple CLs. This is change 1/5 which moves .c files from arch/x86 to acpi/. The only acpi files that are still retained under arch/x86 are: a. acpi_s3.c: This doesn't really deal with ACPI tables. Also, there are some assumptions in there about SMM which will have to be resolved if this file needs to be moved to common code. b. acpi_bert_storage.c/bert_storage.h: This file is currently written specifically with x86 in mind. So, not moving the file for now. Motivation for this change: Not all stages on Picasso SoC are targeted for the same architecture. For example, verstage (if runs before bootblock) will be targeted for non-x86. This makes it difficult to add device tree to verstage which would be required to get to SoC configs from the tree. This is because the device tree on x86 platforms currently contains a lot of devices that require ACPI related enums and structs (like acpi_gpio, acpi_pld, acpi_dp and so on). Hence, this change removes all ACPI table support out of arch/x86. BUG=b:155428745 Change-Id: Icc6b793c52c86483a8c52e0555619e36869a869e Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/40930 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2020-05-01 04:13:47 +02:00
ramstage-y += acpigen_dsm.c
acpi: Move PCI functions to separate file Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Change-Id: Idc96b99da9f9037267c0bec2c839014b13ceb8cc Reviewed-on: https://review.coreboot.org/c/coreboot/+/51106 Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Lance Zhao Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-02-25 21:14:49 +01:00
ramstage-$(CONFIG_PCI) += acpigen_pci.c
acpi: Move ACPI table support out of arch/x86 (1/5) This change moves all ACPI table support in coreboot currently living under arch/x86 into common code to make it architecture independent. ACPI table generation is not really tied to any architecture and hence it makes sense to move this to its own directory. In order to make it easier to review, this change is being split into multiple CLs. This is change 1/5 which moves .c files from arch/x86 to acpi/. The only acpi files that are still retained under arch/x86 are: a. acpi_s3.c: This doesn't really deal with ACPI tables. Also, there are some assumptions in there about SMM which will have to be resolved if this file needs to be moved to common code. b. acpi_bert_storage.c/bert_storage.h: This file is currently written specifically with x86 in mind. So, not moving the file for now. Motivation for this change: Not all stages on Picasso SoC are targeted for the same architecture. For example, verstage (if runs before bootblock) will be targeted for non-x86. This makes it difficult to add device tree to verstage which would be required to get to SoC configs from the tree. This is because the device tree on x86 platforms currently contains a lot of devices that require ACPI related enums and structs (like acpi_gpio, acpi_pld, acpi_dp and so on). Hence, this change removes all ACPI table support out of arch/x86. BUG=b:155428745 Change-Id: Icc6b793c52c86483a8c52e0555619e36869a869e Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/40930 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2020-05-01 04:13:47 +02:00
ramstage-y += acpigen_ps2_keybd.c
acpi: Add new file for implementing Type-C Connector class The USB Type-C Connector Class in the Linux kernel is not specific to the ChromeOS EC, so this functionality is now split out into a separate file, acpigen_usb.c. Documentation about the kernel side is available at https://www.kernel.org/doc/html/latest/driver-api/usb/typec.html. Change-Id: Ife5b8b517b261e7c0068c862ea65039c20382c5a Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41539 Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-05-19 20:38:43 +02:00
ramstage-y += acpigen_usb.c
acpi: Remove acpi_ from filenames This change drops acpi_ prefix from filenames under src/acpi/. BUG=b:155428745 Change-Id: Iadda2b848701367e51f4f74706154f7e36a87df6 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/40941 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
2020-05-01 08:56:20 +02:00
ramstage-y += device.c
ACPI: Add framework for GNVS initialisation Provide common initialisation point for setting up GNVS structure before first SMI is triggered. Change-Id: Iccad533c3824d70f6cbae52cc8dd79f142ece944 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/42423 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-06-17 00:04:44 +02:00
ramstage-$(CONFIG_CHROMEOS) += chromeos-gnvs.c
ACPI: Clean up GNVS initialisation With the common <soc/nvs.h> approach platform does not need to implement the common accessors or sizeof() function. Change-Id: I1050a252f765c763c1ae2d1610cbfb0d973ba026 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49793 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2021-01-11 17:40:37 +01:00
ramstage-$(CONFIG_ACPI_SOC_NVS) += gnvs.c
acpi: Remove acpi_ from filenames This change drops acpi_ prefix from filenames under src/acpi/. BUG=b:155428745 Change-Id: Iadda2b848701367e51f4f74706154f7e36a87df6 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/40941 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
2020-05-01 08:56:20 +02:00
ramstage-y += pld.c
acpi: Move ACPI table support out of arch/x86 (1/5) This change moves all ACPI table support in coreboot currently living under arch/x86 into common code to make it architecture independent. ACPI table generation is not really tied to any architecture and hence it makes sense to move this to its own directory. In order to make it easier to review, this change is being split into multiple CLs. This is change 1/5 which moves .c files from arch/x86 to acpi/. The only acpi files that are still retained under arch/x86 are: a. acpi_s3.c: This doesn't really deal with ACPI tables. Also, there are some assumptions in there about SMM which will have to be resolved if this file needs to be moved to common code. b. acpi_bert_storage.c/bert_storage.h: This file is currently written specifically with x86 in mind. So, not moving the file for now. Motivation for this change: Not all stages on Picasso SoC are targeted for the same architecture. For example, verstage (if runs before bootblock) will be targeted for non-x86. This makes it difficult to add device tree to verstage which would be required to get to SoC configs from the tree. This is because the device tree on x86 platforms currently contains a lot of devices that require ACPI related enums and structs (like acpi_gpio, acpi_pld, acpi_dp and so on). Hence, this change removes all ACPI table support out of arch/x86. BUG=b:155428745 Change-Id: Icc6b793c52c86483a8c52e0555619e36869a869e Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/40930 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2020-05-01 04:13:47 +02:00
ramstage-y += sata.c
acpi/soundwire: Add functions to generate SoundWire properties This change uses the previously added SoundWire definitions to provide functions that generate ACPI Device Properties for SoundWire controllers and codecs. A SoundWire controller driver should populate `struct soundwire_controller` and pass it to soundwire_gen_controller(). This will add all of the defined master links provided by the controller. A SoundWire codec driver should populate the necessary members in struct soundwire_codec and pass it to soundwire_gen_codec(). Several properties are optional and depend on whether the codec itself supports certain features and behaviors. The goal of this interface is to handle all of the properties defined in the SoundWire Discovery and Configuration Specification Version 1.0 so that controller and codec drivers do not need to all have code for writing standard properties. Both of these functions also provide a callback method for adding custom properties that are not defined by the SoundWire DisCo Specification. These properties may be required by OS drivers but are outside of the scope of the SoundWire specification itself. This code is tested with controller, codec, and mainboard implementations in subsequent commits. BUG=b:146482091 Signed-off-by: Duncan Laurie <dlaurie@google.com> Change-Id: Ib185eaacf3c4914087497ed65479a772c155502b Reviewed-on: https://review.coreboot.org/c/coreboot/+/40884 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
2020-04-29 21:09:32 +02:00
ramstage-y += soundwire.c
acpi: Move ACPI table support out of arch/x86 (1/5) This change moves all ACPI table support in coreboot currently living under arch/x86 into common code to make it architecture independent. ACPI table generation is not really tied to any architecture and hence it makes sense to move this to its own directory. In order to make it easier to review, this change is being split into multiple CLs. This is change 1/5 which moves .c files from arch/x86 to acpi/. The only acpi files that are still retained under arch/x86 are: a. acpi_s3.c: This doesn't really deal with ACPI tables. Also, there are some assumptions in there about SMM which will have to be resolved if this file needs to be moved to common code. b. acpi_bert_storage.c/bert_storage.h: This file is currently written specifically with x86 in mind. So, not moving the file for now. Motivation for this change: Not all stages on Picasso SoC are targeted for the same architecture. For example, verstage (if runs before bootblock) will be targeted for non-x86. This makes it difficult to add device tree to verstage which would be required to get to SoC configs from the tree. This is because the device tree on x86 platforms currently contains a lot of devices that require ACPI related enums and structs (like acpi_gpio, acpi_pld, acpi_dp and so on). Hence, this change removes all ACPI table support out of arch/x86. BUG=b:155428745 Change-Id: Icc6b793c52c86483a8c52e0555619e36869a869e Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/40930 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2020-05-01 04:13:47 +02:00
ACPI: Add helpers for CBMEM_ID_POWER_STATE Create uniform logging for the (unlikely) case of a CBMEM entry disappearing. Change-Id: I7c5414a03d869423c8ae5192a990fde5f9582f2d Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49817 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2021-01-21 15:05:26 +01:00
all-y += acpi_pm.c
smm-y += acpi_pm.c
ACPI S3: Split arch-agnostic parts Change-Id: I9fc2d1cdbb280f781045882bc4ac98c67946953e Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/42614 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-06-18 12:44:29 +02:00
acpi: Move ACPI table support out of arch/x86 (5/5) This change moves all ACPI table support in coreboot currently living under arch/x86 into common code to make it architecture independent. ACPI table generation is not really tied to any architecture and hence it makes sense to move this to its own directory. In order to make it easier to review, this change is being split into multiple CLs. This is change 5/5 which moves the addition of ACPI table related files from arch/x86/Makefile.inc to acpi/Makefile.inc. BUG=b:155428745 Change-Id: I8143fd37357aeb0561516450adddc6714d539ada Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/40940 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Reviewed-by: Frans Hendriks <fhendriks@eltan.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
2020-05-01 08:05:11 +02:00
ifneq ($(wildcard src/mainboard/$(MAINBOARDDIR)/acpi_tables.c),)
ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/acpi_tables.c
endif
$(eval $(call asl_template,dsdt))
ACPI: Remove Kconfig COMMON_FADT Also remove default mb/*/fadt.c from Makefiles. Change-Id: I6a2839c524f8311ec9a382a84066afc7d579eaca Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41948 Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-05-31 00:58:41 +02:00
endif # CONFIG_HAVE_ACPI_TABLES