coreboot-kgpe-d16/targets/tyan/s2850/Config.lb

# Sample config file for 
# the Tyan s2850 
# This will make a target directory of ./s2850

target s2850
mainboard tyan/s2850

# Tyan s2850
romimage "normal"
#       48K for SCSI FW or ATI ROM
        option ROM_SIZE = 475136
#       48K for SCSI FW and 48K for ATI ROM
#       option ROM_SIZE = 425984 
#       64K for Etherboot
#        option ROM_SIZE = 458752 
	option USE_FALLBACK_IMAGE=0
#	option ROM_IMAGE_SIZE=0x11800
	option ROM_IMAGE_SIZE=0x16000
#	option ROM_IMAGE_SIZE=0x17800
#	option ROM_IMAGE_SIZE=0x13c00
	option XIP_ROM_SIZE=0x20000
	option LINUXBIOS_EXTRA_VERSION="$(shell cat ../../VERSION)_Normal"
#       payload ../../../payloads/tg3--ide_disk.zelf
#        payload ../../../payloads/filo.elf
#        payload ../../../payloads/filo_mem.elf
#       payload ../../../payloads/filo.zelf
#	payload ../../../payloads/tg3.zelf
#	payload ../../../payloads/tg3_vga.zelf
	payload ../../../payloads/tg3--filo_hda2_vga.zelf
#	payload ../../../payloads/tg3--filo_u_hda2_vga.zelf
#        payload ../../../payloads/tg3--filo_hda2_com2.zelf
#       payload ../../../payloads/e1000--filo.zelf
#        payload ../../../payloads/tg3--e1000--filo.zelf
#        payload ../../../payloads/tg3--eepro100--e1000--filo_hda2.zelf
end

romimage "fallback" 
	option USE_FALLBACK_IMAGE=1
#	option ROM_IMAGE_SIZE=0x11800
	option ROM_IMAGE_SIZE=0x16000
#	option ROM_IMAGE_SIZE=0x17800
#	option ROM_IMAGE_SIZE=0x13c00
	option XIP_ROM_SIZE=0x20000
	option LINUXBIOS_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback"
#       payload ../../../payloads/tg3--ide_disk.zelf
#        payload ../../../payloads/filo.elf
#        payload ../../../payloads/filo_mem.elf
#       payload ../../../payloads/filo.zelf
#	payload ../../../payloads/tg3.zelf
#	payload ../../../payloads/tg3_vga.zelf
	payload ../../../payloads/tg3--filo_hda2_vga.zelf
#	payload ../../../payloads/tg3--filo_u_hda2_vga.zelf
#        payload ../../../payloads/tg3--filo_hda2_com2.zelf
#       payload ../../../payloads/e1000--filo.zelf
#        payload ../../../payloads/tg3--e1000--filo.zelf
#        payload ../../../payloads/tg3--eepro100--e1000--filo_hda2.zelf
end

buildrom ./linuxbios.rom ROM_SIZE "normal" "fallback"
new git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1303 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 2003-12-02 05:07:18 +01:00			`# Sample config file for`
			`# the Tyan s2850`
			`# This will make a target directory of ./s2850`

			`target s2850`
Tyan update to work with new CPU Config git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1693 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 2004-10-20 07:07:16 +02:00			`mainboard tyan/s2850`
new git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1303 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 2003-12-02 05:07:18 +01:00
onboard pci rom git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1859 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 2005-01-13 01:04:56 +01:00			`# Tyan s2850`
new git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1303 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 2003-12-02 05:07:18 +01:00			`romimage "normal"`
VERSION and rom_image_size git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1914 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 2005-02-09 02:25:17 +01:00			`# 48K for SCSI FW or ATI ROM`
onboard pci rom git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1859 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 2005-01-13 01:04:56 +01:00			`option ROM_SIZE = 475136`
Tyan update to work with new CPU Config git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1693 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 2004-10-20 07:07:16 +02:00			`# 48K for SCSI FW and 48K for ATI ROM`
			`# option ROM_SIZE = 425984`
			`# 64K for Etherboot`
			`# option ROM_SIZE = 458752`
new git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1303 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 2003-12-02 05:07:18 +01:00			`option USE_FALLBACK_IMAGE=0`
VERSION and rom_image_size git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1914 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 2005-02-09 02:25:17 +01:00			`# option ROM_IMAGE_SIZE=0x11800`
eric patch 1. x86_setup_mtrr take address bit. 2. generic ht, pcix, pcie beidge... 3. scan bus and reset_bus 4. ht read ctrl to decide if the ht chain is ready 5. Intel e7520 and e7525 support 6. new ich5r support 7. intel sb 6300 support. yhlu patch 1. split x86_setup_mtrrs to fixed and var 2. if (resource->flags & IORESOURCE_FIXED ) return; in device.c pick_largest_resource 3. in_conherent.c K8_SCAN_PCI_BUS git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1982 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 2005-07-08 04:49:49 +02:00			`option ROM_IMAGE_SIZE=0x16000`
VERSION and rom_image_size git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1914 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 2005-02-09 02:25:17 +01:00			`# option ROM_IMAGE_SIZE=0x17800`
eric patch 1. x86_setup_mtrr take address bit. 2. generic ht, pcix, pcie beidge... 3. scan bus and reset_bus 4. ht read ctrl to decide if the ht chain is ready 5. Intel e7520 and e7525 support 6. new ich5r support 7. intel sb 6300 support. yhlu patch 1. split x86_setup_mtrrs to fixed and var 2. if (resource->flags & IORESOURCE_FIXED ) return; in device.c pick_largest_resource 3. in_conherent.c K8_SCAN_PCI_BUS git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1982 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 2005-07-08 04:49:49 +02:00			`# option ROM_IMAGE_SIZE=0x13c00`
onboard pci rom git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1859 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 2005-01-13 01:04:56 +01:00			`option XIP_ROM_SIZE=0x20000`
Tyan update to work with new CPU Config git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1693 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 2004-10-20 07:07:16 +02:00			`option LINUXBIOS_EXTRA_VERSION="$(shell cat ../../VERSION)_Normal"`
			`# payload ../../../payloads/tg3--ide_disk.zelf`
Changes for btext and etherboot and filo merge support git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1540 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 2004-04-28 07:37:36 +02:00			`# payload ../../../payloads/filo.elf`
			`# payload ../../../payloads/filo_mem.elf`
Tyan update to work with new CPU Config git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1693 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 2004-10-20 07:07:16 +02:00			`# payload ../../../payloads/filo.zelf`
VERSION and rom_image_size git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1914 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 2005-02-09 02:25:17 +01:00			`# payload ../../../payloads/tg3.zelf`
			`# payload ../../../payloads/tg3_vga.zelf`
eric patch 1. x86_setup_mtrr take address bit. 2. generic ht, pcix, pcie beidge... 3. scan bus and reset_bus 4. ht read ctrl to decide if the ht chain is ready 5. Intel e7520 and e7525 support 6. new ich5r support 7. intel sb 6300 support. yhlu patch 1. split x86_setup_mtrrs to fixed and var 2. if (resource->flags & IORESOURCE_FIXED ) return; in device.c pick_largest_resource 3. in_conherent.c K8_SCAN_PCI_BUS git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1982 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 2005-07-08 04:49:49 +02:00			`payload ../../../payloads/tg3--filo_hda2_vga.zelf`
			`# payload ../../../payloads/tg3--filo_u_hda2_vga.zelf`
VERSION and rom_image_size git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1914 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 2005-02-09 02:25:17 +01:00			`# payload ../../../payloads/tg3--filo_hda2_com2.zelf`
Tyan update to work with new CPU Config git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1693 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 2004-10-20 07:07:16 +02:00			`# payload ../../../payloads/e1000--filo.zelf`
			`# payload ../../../payloads/tg3--e1000--filo.zelf`
btext fix git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1822 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 2004-12-16 03:44:25 +01:00			`# payload ../../../payloads/tg3--eepro100--e1000--filo_hda2.zelf`
new git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1303 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 2003-12-02 05:07:18 +01:00			`end`

			`romimage "fallback"`
			`option USE_FALLBACK_IMAGE=1`
VERSION and rom_image_size git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1914 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 2005-02-09 02:25:17 +01:00			`# option ROM_IMAGE_SIZE=0x11800`
eric patch 1. x86_setup_mtrr take address bit. 2. generic ht, pcix, pcie beidge... 3. scan bus and reset_bus 4. ht read ctrl to decide if the ht chain is ready 5. Intel e7520 and e7525 support 6. new ich5r support 7. intel sb 6300 support. yhlu patch 1. split x86_setup_mtrrs to fixed and var 2. if (resource->flags & IORESOURCE_FIXED ) return; in device.c pick_largest_resource 3. in_conherent.c K8_SCAN_PCI_BUS git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1982 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 2005-07-08 04:49:49 +02:00			`option ROM_IMAGE_SIZE=0x16000`
VERSION and rom_image_size git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1914 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 2005-02-09 02:25:17 +01:00			`# option ROM_IMAGE_SIZE=0x17800`
eric patch 1. x86_setup_mtrr take address bit. 2. generic ht, pcix, pcie beidge... 3. scan bus and reset_bus 4. ht read ctrl to decide if the ht chain is ready 5. Intel e7520 and e7525 support 6. new ich5r support 7. intel sb 6300 support. yhlu patch 1. split x86_setup_mtrrs to fixed and var 2. if (resource->flags & IORESOURCE_FIXED ) return; in device.c pick_largest_resource 3. in_conherent.c K8_SCAN_PCI_BUS git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1982 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 2005-07-08 04:49:49 +02:00			`# option ROM_IMAGE_SIZE=0x13c00`
onboard pci rom git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1859 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 2005-01-13 01:04:56 +01:00			`option XIP_ROM_SIZE=0x20000`
Tyan update to work with new CPU Config git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1693 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 2004-10-20 07:07:16 +02:00			`option LINUXBIOS_EXTRA_VERSION="$(shell cat ../../VERSION)_Fallback"`
			`# payload ../../../payloads/tg3--ide_disk.zelf`
Changes for btext and etherboot and filo merge support git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1540 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 2004-04-28 07:37:36 +02:00			`# payload ../../../payloads/filo.elf`
			`# payload ../../../payloads/filo_mem.elf`
Tyan update to work with new CPU Config git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1693 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 2004-10-20 07:07:16 +02:00			`# payload ../../../payloads/filo.zelf`
VERSION and rom_image_size git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1914 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 2005-02-09 02:25:17 +01:00			`# payload ../../../payloads/tg3.zelf`
			`# payload ../../../payloads/tg3_vga.zelf`
eric patch 1. x86_setup_mtrr take address bit. 2. generic ht, pcix, pcie beidge... 3. scan bus and reset_bus 4. ht read ctrl to decide if the ht chain is ready 5. Intel e7520 and e7525 support 6. new ich5r support 7. intel sb 6300 support. yhlu patch 1. split x86_setup_mtrrs to fixed and var 2. if (resource->flags & IORESOURCE_FIXED ) return; in device.c pick_largest_resource 3. in_conherent.c K8_SCAN_PCI_BUS git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1982 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 2005-07-08 04:49:49 +02:00			`payload ../../../payloads/tg3--filo_hda2_vga.zelf`
			`# payload ../../../payloads/tg3--filo_u_hda2_vga.zelf`
VERSION and rom_image_size git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1914 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 2005-02-09 02:25:17 +01:00			`# payload ../../../payloads/tg3--filo_hda2_com2.zelf`
Tyan update to work with new CPU Config git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1693 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 2004-10-20 07:07:16 +02:00			`# payload ../../../payloads/e1000--filo.zelf`
			`# payload ../../../payloads/tg3--e1000--filo.zelf`
btext fix git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1822 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 2004-12-16 03:44:25 +01:00			`# payload ../../../payloads/tg3--eepro100--e1000--filo_hda2.zelf`
new git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1303 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 2003-12-02 05:07:18 +01:00			`end`

			`buildrom ./linuxbios.rom ROM_SIZE "normal" "fallback"`