2022-12-01 20:47:20 +01:00
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# External Resources
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This is a list of resources that could be useful to coreboot developers.
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These are not endorsed or officially recommended by the coreboot project,
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but simply listed here in the hopes that someone will find something
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useful.
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Please add any helpful or informational links and sections as you see fit.
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## Articles
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* External Interrupts in the x86 system.
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* [Part 1: Interrupt controller evolution](https://habr.com/en/post/446312/)
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* [Part 2: Linux kernel boot options](https://habr.com/en/post/501660/)
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* [Part 3: Interrupt routing setup in a chipset](https://habr.com/en/post/501912/)
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* System address map initialization in x86/x64 architecture.
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* [Part 1: PCI-based systems](https://resources.infosecinstitute.com/topic/system-address-map-initialization-in-x86x64-architecture-part-1-pci-based-systems/)
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* [Part 2: PCI express-based systems](https://resources.infosecinstitute.com/topic/system-address-map-initialization-x86x64-architecture-part-2-pci-express-based-systems/)
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* [PCIe elastic buffer](https://www.mindshare.com/files/resources/mindshare_pcie_elastic_buffer.pdf)
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* [Boot Guard and PSB have user-hostile defaults](https://mjg59.dreamwidth.org/58424.html)
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## General Information
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* [OS Dev](https://wiki.osdev.org/Categorized_Main_Page)
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* [Interface BUS](http://www.interfacebus.com/)
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2022-12-16 09:07:20 +01:00
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## OpenSecurityTraining2
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OpenSecurityTraining2 is dedicated to sharing training material for any topic
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related to computer security, including coreboot.
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There are various ways to learn firmware, some are more efficient than others,
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depending on the people. Before going straight to practice and experimenting
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with hardware, it can be beneficial to learn the basics of computing. OST2
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focuses on conveying computer architecture and security information in the form
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of structured instructor-led classes, available to everyone for free.
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All material is licensed [CC BY-SA 4.0](http://creativecommons.org/licenses/by-sa/4.0/),
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allowing anyone to use the material however they see fit, so long as they share
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modified works back to the community.
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Below is a list of currently available courses that can help understand the
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inner workings of coreboot and other firmware-related topics:
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* [coreboot design principles and boot process](https://ost2.fyi/Arch4031)
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* [x86-64 Assembly](https://ost2.fyi/Arch1001)
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* [x86-64 OS Internals](https://ost2.fyi/Arch2001)
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* [x86-64 Intel Firmware Attack & Defense](https://ost2.fyi/Arch4001)
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There are [additional security courses](https://p.ost2.fyi/courses) at the site
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as well (such as
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[how to avoid writing exploitable code in C/C++](https://ost2.fyi/Vulns1001).)
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2022-12-01 20:47:20 +01:00
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## Firmware Specifications & Information
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* [System Management BIOS - SMBIOS](https://www.dmtf.org/standards/smbios)
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* [Desktop and Mobile Architecture for System Hardware - DASH](https://www.dmtf.org/standards/dash)
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* [PNP BIOS](https://www.intel.com/content/dam/support/us/en/documents/motherboards/desktop/sb/pnpbiosspecificationv10a.pdf)
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### ACPI
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* [ACPI Specs](https://uefi.org/acpi/specs)
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* [ACPI in Linux](https://www.kernel.org/doc/ols/2005/ols2005v1-pages-59-76.pdf)
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* [ACPI 5 Linux](https://blog.linuxplumbersconf.org/2012/wp-content/uploads/2012/09/LPC2012-ACPI5.pdf)
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* [ACPI 6 Linux](https://events.static.linuxfound.org/sites/events/files/slides/ACPI_6_and_Linux_0.pdf)
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### Security
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* [Intel Boot Guard](https://edk2-docs.gitbook.io/understanding-the-uefi-secure-boot-chain/secure_boot_chain_in_uefi/intel_boot_guard)
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## Hardware information
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* [WikiChip](https://en.wikichip.org/wiki/WikiChip)
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* [Sandpile](https://www.sandpile.org/)
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* [CPU-World](https://www.cpu-world.com/index.html)
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* [CPU-Upgrade](https://www.cpu-upgrade.com/index.html)
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### Hardware Specifications & Standards
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* [Bluetooth](https://www.bluetooth.com/specifications/specs/) - Bluetooth SIG
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* [eMMC](https://www.jedec.org/) - JEDEC - (LOGIN REQUIRED)
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* [eSPI](https://cdrdv2.intel.com/v1/dl/getContent/645987) - Intel
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* [I2c Spec](https://web.archive.org/web/20170704151406/https://www.nxp.com/docs/en/user-guide/UM10204.pdf),
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[Appnote](https://www.nxp.com/docs/en/application-note/AN10216.pdf) - NXP
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* [I2S](https://www.nxp.com/docs/en/user-manual/UM11732.pdf) - NXP
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* [I3C](https://www.mipi.org/specifications/i3c-sensor-specification) - MIPI Alliance (LOGIN REQUIRED)
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* [Memory](https://www.jedec.org/) - JEDEC - (LOGIN REQUIRED)
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* [NVMe](https://nvmexpress.org/developers/) - NVMe Specifications
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* [LPC](https://www.intel.com/content/dam/www/program/design/us/en/documents/low-pin-count-interface-specification.pdf) - Intel
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* [PCI / PCIe / M.2](https://pcisig.com/specifications) - PCI-SIG - (LOGIN REQUIRED)
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* [Power Delivery](https://www.usb.org/documents) - USB Implementers Forum
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* [SATA](https://sata-io.org/developers/purchase-specification) - SATA-IO (LOGIN REQUIRED)
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* [SMBus](http://www.smbus.org/specs/) - System Management Interface Forum
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* [Smart Battery](http://smartbattery.org/specs/) - Smart Battery System Implementers Forum
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* [USB](https://www.usb.org/documents) - USB Implementers Forum
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* [WI-FI](https://www.wi-fi.org/discover-wi-fi/specifications) - Wi-Fi Alliance
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### Chip Vendor Documentation
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* AMD
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* [Developer Guides, Manuals & ISA Documents](https://developer.amd.com/resources/developer-guides-manuals/)
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* [AMD Tech Docs - Official Documentation Page](https://www.amd.com/en/support/tech-docs)
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* ARM
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* [Tools and Software - Specifications](https://developer.arm.com/tools-and-software/software-development-tools/specifications)
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* Intel
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* [Developer Zone](https://www.intel.com/content/www/us/en/developer/overview.html)
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* [Resource & Documentation Center](https://www.intel.com/content/www/us/en/resources-documentation/developer.html)
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* [Architecture Software Developer Manuals](https://www.intel.com/content/www/us/en/developer/articles/technical/intel-sdm.html)
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* [Intel specific ACPI](https://www.intel.com/content/www/us/en/standards/processor-vendor-specific-acpi-specification.html)
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2023-09-26 00:47:08 +02:00
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* [coreboot on Eagle Stream](https://www.intel.com/content/www/us/en/content-details/778593/coreboot-practice-on-eagle-stream.html)
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2022-12-01 20:47:20 +01:00
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* Rockchip
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* [Open Source Wiki](https://opensource.rock-chips.com/wiki_Main_Page)
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## Software
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* [Fiedka](https://github.com/fiedka/fiedka) - A graphical Firmware Editor
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* [IOTools](https://github.com/adurbin/iotools) - Command line tools to access hardware registers
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* [UEFITool](https://github.com/LongSoft/UEFITool) - Editor for UEFI PI compliant firmware images
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* [CHIPSEC](https://chipsec.github.io) - Framework for analyzing platform level security & configuration
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* [SPDEditor](https://github.com/integralfx/SPDEditor) - GUI to edit DDR3 SPD files
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* [DDR4XMPEditor](https://github.com/integralfx/DDR4XMPEditor) - Editor for DDR4 SPD and XMP
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* [overclockSPD](https://github.com/baboomerang/overclockSPD) - Fast and easy way to read and write data to RAM SPDs.
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* [VBiosFinder](https://github.com/coderobe/VBiosFinder) - This tool attempts to extract a VBIOS from a BIOS update.
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## Infrastructure software
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* [Kconfig](https://www.kernel.org/doc/html/latest/kbuild/kconfig-language.html)
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* [GNU Make](https://www.gnu.org/software/make/manual/)
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