2023-08-18 17:41:38 +02:00
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Upcoming release - coreboot 4.22
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========================================================================
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The 4.22 release is planned for mid-November, 2023
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Update this document with changes that should be in the release notes.
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* Please use Markdown.
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* See the past few release notes for the general format.
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* The chip and board additions and removals will be updated right
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before the release, so those do not need to be added.
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* Note that all changes before the release are done are marked upcoming.
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A final version of the notes are done after the release.
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### Significant or interesting changes
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* Add changes that need a full description here
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* This section should have full descriptions and can or should have
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a link to the referenced commits.
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2023-09-18 22:47:09 +02:00
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### x86: support .data section for pre-memory stages
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x86 pre-memory stages did not support the `.data` section and as a
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result developers were required to include runtime initialization code
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instead of relying on C global variable definition.
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Other platforms do not have that limitation. Hence, resolving it helps
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to align code and reduce compilation based restriction (cf. the use of
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`ENV_HAS_DATA_SECTION` compilation flag in various places of coreboot
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code).
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There were three types of binary to consider:
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1. eXecute-In-Place pre-memory stages
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2. `bootblock` stage is a bit different as it uses Cache-As-Ram but
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the memory mapping and its entry code different
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3. pre-memory stages loaded in and executed from Cache-As-RAM
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(cf. `CONFIG_NO_XIP_EARLY_STAGES`).
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eXecute-In-Place pre-memory stages (#1) relies on a new ELF segment as
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the code segment Virtual Memory Address and Load Memory Address are
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identical but the data needs to be linked in cache-As-RAM (VMA) but to
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be stored right after the code (LMA).
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`bootblock` (#2) also uses this new segment to store the data right
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after the code and it loads it to Cache-As-RAM at runtime. However,
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the code involved is different.
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Not eXecute-In-Place pre-memory stages (#3) did not really need any
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special work other than enabling a .data section as the code and data
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VMA / LMA translation vector is the same.
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Related important commits:
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- c9cae530e5ac54c5b3639d0d555966ca5cad65ff ("cbfstool: Make add-stage
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support multiple ignore sections")
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- 79f2e1fc8b6192e96f99c05f71baeb77d4633d40 ("cbfstool: Make add-stage
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support multiple loadable segments")
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- b7832de0260b042c25bf8f53abcb32e20a29ae9c ("x86: Add .data section
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support for pre-memory stages")
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2023-08-18 17:41:38 +02:00
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### Toolchain updates
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2023-08-01 04:49:56 +02:00
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* Upgrade GMP from 6.2.1 to 6.3.0
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2023-07-30 18:18:41 +02:00
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* Upgrade binutils from 2.40 to 2.41
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2023-08-22 18:04:52 +02:00
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* Upgrade MPFR from 4.2.0 to 4.2.1
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2023-08-18 17:41:38 +02:00
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### Additional coreboot changes
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The following are changes across a number of patches, or changes worth
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noting, but not needing a full description.
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* Changes that only need a line or two of description go here.
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### Platform Updates
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* To be filled in immediately before the release by the release team
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### Plans to move platform support to a branch
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* Section to be filled in or removed after discussion
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### Statistics from the 4.21 to the 4.22 release
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* To be filled in immediately before the release by the release team
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### Significant Known and Open Issues
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* To be filled in immediately before the release by the release team
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