76 lines
1.7 KiB
Text
76 lines
1.7 KiB
Text
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##
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## This file is part of the coreboot project.
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##
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## Copyright (C) 2013-2014 Sage Electronic Engineering, LLC.
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; version 2 of the License.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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## You should have received a copy of the GNU General Public License
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## along with this program; if not, write to the Free Software
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## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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##
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if BOARD_SIEMENS_MC_TCU3
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config BOARD_SPECIFIC_OPTIONS # dummy
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def_bool y
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select SOC_INTEL_FSP_BAYTRAIL
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select BOARD_ROMSIZE_KB_16384
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select HAVE_ACPI_TABLES
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select HAVE_OPTION_TABLE
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select OVERRIDE_MRC_CACHE_LOC
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select INCLUDE_MICROCODE_IN_BUILD
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select ENABLE_BUILTIN_COM1
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select HAVE_FSP_BIN if FSP_PACKAGE_DEFAULT
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select ENABLE_FSP_FAST_BOOT
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select TSC_MONOTONIC_TIMER
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select DRIVER_INTEL_I210
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select SOC_INTEL_FSP_BAYTRAIL_MD
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config MAINBOARD_DIR
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string
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default "siemens/mc_tcu3"
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config INCLUDE_ME
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bool
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default n
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config MAINBOARD_PART_NUMBER
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string
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default "MC_TCU3 (FSP)"
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config MAX_CPUS
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int
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default 16
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config CACHE_ROM_SIZE_OVERRIDE
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hex
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default 0x1000000
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config MRC_CACHE_LOC_OVERRIDE
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hex
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default 0xfff80000
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depends on ENABLE_FSP_FAST_BOOT
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config CBFS_SIZE
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hex
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default 0x00e00000
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config FSP_PACKAGE_DEFAULT
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bool "Configure defaults for the Intel FSP package"
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default n
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config VGA_BIOS
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bool
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default y if FSP_PACKAGE_DEFAULT
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endif # BOARD_SIEMENS_MC_TCU3
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