87 lines
2.4 KiB
C
87 lines
2.4 KiB
C
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2007-2008 coresystems GmbH
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; version 2 of
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* the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
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* MA 02110-1301 USA
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*/
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#include <string.h>
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#include <device/pci.h>
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#include <arch/acpi.h>
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void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
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{
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acpi_header_t *header = &(fadt->header);
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u16 pmbase = pci_read_config16(dev_find_slot(0, PCI_DEVFN(0x1f,0)), 0x40) & 0xfffe;
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memset((void *) fadt, 0, sizeof(acpi_fadt_t));
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memcpy(header->signature, "FACP", 4);
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header->length = 132;
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header->revision = 1;
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memcpy(header->oem_id, "CORE ", 6);
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memcpy(header->oem_table_id, "COREBOOT", 8);
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memcpy(header->asl_compiler_id, "CORE", 4);
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header->asl_compiler_revision = 0;
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fadt->firmware_ctrl = (unsigned long) facs;
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fadt->dsdt = (unsigned long) dsdt;
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fadt->preferred_pm_profile = 0;
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fadt->sci_int = 0x9;
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fadt->smi_cmd = 0xb2;
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fadt->acpi_enable = 0xe1;
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fadt->acpi_disable = 0x1e;
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fadt->s4bios_req = 0x0;
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fadt->pstate_cnt = 0xe2;
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fadt->pm1a_evt_blk = pmbase;
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fadt->pm1b_evt_blk = 0x0;
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fadt->pm1a_cnt_blk = pmbase + 0x4;
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fadt->pm1b_cnt_blk = 0x0;
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fadt->pm2_cnt_blk = pmbase + 0x20;
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fadt->pm_tmr_blk = pmbase + 0x8;
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fadt->gpe0_blk = pmbase + 0x28;
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fadt->gpe1_blk = 0;
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fadt->pm1_evt_len = 4;
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fadt->pm1_cnt_len = 2;
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fadt->pm2_cnt_len = 1;
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fadt->pm_tmr_len = 4;
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fadt->gpe0_blk_len = 8;
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fadt->gpe1_blk_len = 0;
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fadt->gpe1_base = 0;
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fadt->cst_cnt = 0xe3;
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fadt->p_lvl2_lat = 1;
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fadt->p_lvl3_lat = 85;
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fadt->flush_size = 1024;
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fadt->flush_stride = 16;
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fadt->duty_offset = 1;
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fadt->duty_width = 0;
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fadt->day_alrm = 0xd;
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fadt->mon_alrm = 0x00;
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fadt->century = 0x00;
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fadt->iapc_boot_arch = 0x03;
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fadt->flags = 0x80a5;
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// wbinvd is operational
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// all cpus support c1
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// sleep button is generic
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// rtc wakeup/s4 not possible
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header->checksum =
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acpi_checksum((void *) fadt, header->length);
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}
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