72 lines
1.8 KiB
C
72 lines
1.8 KiB
C
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2008-2009 coresystems GmbH
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* Copyright (C) 2016 Intel Corp.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <arch/acpi.h>
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#include <arch/io.h>
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#include <console/console.h>
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#include <cpu/x86/smm.h>
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#include <elog.h>
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#include <ec/google/chromeec/smm.h>
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#include <soc/iomap.h>
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#include <soc/nvs.h>
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#include <soc/pm.h>
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#include <soc/smm.h>
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#include "ec.h"
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#include "gpio.h"
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int mainboard_io_trap_handler(int smif)
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{
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switch (smif) {
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case 0x99:
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printk(BIOS_DEBUG, "Sample\n");
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smm_get_gnvs()->smif = 0;
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break;
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default:
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return 0;
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}
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/* On success, the IO Trap Handler returns 0
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* On failure, the IO Trap Handler returns a value != 0
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*
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* For now, we force the return value to 0 and log all traps to
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* see what's going on.
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*/
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return 1;
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}
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void mainboard_smi_gpi_handler(const struct gpi_status *sts)
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{
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if (IS_ENABLED(CONFIG_EC_GOOGLE_CHROMEEC))
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if (gpi_status_get(sts, EC_SMI_GPI))
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chromeec_smi_process_events();
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}
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void mainboard_smi_sleep(u8 slp_typ)
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{
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if (IS_ENABLED(CONFIG_EC_GOOGLE_CHROMEEC))
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if (IS_ENABLED(CONFIG_EC_GOOGLE_CHROMEEC))
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chromeec_smi_sleep(slp_typ, MAINBOARD_EC_S3_WAKE_EVENTS,
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MAINBOARD_EC_S5_WAKE_EVENTS);
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}
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int mainboard_smi_apmc(u8 apmc)
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{
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if (IS_ENABLED(CONFIG_EC_GOOGLE_CHROMEEC))
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chromeec_smi_apmc(apmc, MAINBOARD_EC_SCI_EVENTS,
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MAINBOARD_EC_SMI_EVENTS);
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return 0;
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}
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