57 lines
1.5 KiB
C
57 lines
1.5 KiB
C
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2010 Advanced Micro Devices, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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// Use simple device model for this file even in ramstage
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#define __SIMPLE_DEVICE__
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#include <stdint.h>
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#include <arch/io.h>
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#include <device/pci_ehci.h>
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#include <device/pci_def.h>
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#include <soc/hudson.h>
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#define DEBUGPORT_MISC_CONTROL 0x80
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pci_devfn_t pci_ehci_dbg_dev(unsigned int hcd_idx)
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{
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if (hcd_idx == 3)
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return PCI_DEV(0, 0x16, 0);
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else if (hcd_idx == 2)
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return PCI_DEV(0, 0x13, 0);
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else
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return PCI_DEV(0, 0x12, 0);
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}
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void pci_ehci_dbg_set_port(pci_devfn_t dev, unsigned int port)
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{
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u8 *base_regs = pci_ehci_base_regs(dev);
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u32 reg32;
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/* Write the port number to DEBUGPORT_MISC_CONTROL[31:28]. */
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reg32 = read32(base_regs + DEBUGPORT_MISC_CONTROL);
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reg32 &= ~(0xf << 28);
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reg32 |= (port << 28);
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reg32 |= (1 << 27); /* Enable Debug Port port number remapping. */
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write32(base_regs + DEBUGPORT_MISC_CONTROL, reg32);
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}
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void pci_ehci_dbg_enable(pci_devfn_t dev, unsigned long base)
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{
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/* Enable all of the USB controllers */
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outb(0xEF, PM_INDEX);
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outb(0x7F, PM_DATA);
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}
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