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Add SPI flash driver This driver is taken from u-boot and adapted to match coreboot. It still contains some hacks and is ICH specific at places. Change-Id: I97dd8096f7db3b62f8f4f4e4d08bdee10d88f689 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/997 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-05-10 20:27:32 +02:00
##
## This file is part of the coreboot project.
##
## Copyright (C) 2012 The Chromium OS Authors.
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; version 2 of the License.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
drivers/spi: move cbfs_spi.c location The common boot device spi implementation is very much specific to SPI flash. As such it should be moved into that subdirectory. It's still a high-level option but it correctly depends on BOOT_DEVICE_SPI_FLASH. Additionally that allows the auto-selection of SPI_FLASH by a platform selecting COMMON_CBFS_SPI_WRAPPER which allows for culling of SPI_FLASH selections everywhere. BUG=chrome-os-partner:56151 Change-Id: Ia2ccfdc9e1a4348cd91b381f9712d8853b7d2a79 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/16212 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Martin Roth <martinroth@google.com>
2016-08-12 22:50:16 +02:00
config COMMON_CBFS_SPI_WRAPPER
bool
default n
depends on !ARCH_X86
depends on BOOT_DEVICE_SPI_FLASH
Kconfig: introduce writable boot device notion Indicate to the build system that a platform provides support for a writable boot device. The following will provide the necessary support: COMMON_CBFS_SPI_WRAPPER users soc/intel/apollolake soc/intel/baytrail soc/intel/braswell soc/intel/broadwell soc/intel/skylake The SPI_FLASH option is auto-selected if the platform provides write supoprt for the boot device and SPI flash is the boot device. Other platforms may provide similar support, but they do that in a device specific manner such as selecting SPI_FLASH explicitly. This provides clearance against build failures where chipsets don't provide SPI API implementations even though the platform may use a SPI flash to boot. BUG=chrome-os-partner:56151 Change-Id: If78160f231c8312a313f9b9753607d044345d274 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/16211 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Martin Roth <martinroth@google.com>
2016-08-12 22:00:10 +02:00
select BOOT_DEVICE_SUPPORTS_WRITES
drivers/spi: move cbfs_spi.c location The common boot device spi implementation is very much specific to SPI flash. As such it should be moved into that subdirectory. It's still a high-level option but it correctly depends on BOOT_DEVICE_SPI_FLASH. Additionally that allows the auto-selection of SPI_FLASH by a platform selecting COMMON_CBFS_SPI_WRAPPER which allows for culling of SPI_FLASH selections everywhere. BUG=chrome-os-partner:56151 Change-Id: Ia2ccfdc9e1a4348cd91b381f9712d8853b7d2a79 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/16212 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Martin Roth <martinroth@google.com>
2016-08-12 22:50:16 +02:00
help
Use common wrapper to interface CBFS to SPI bootrom.
Add SPI flash driver This driver is taken from u-boot and adapted to match coreboot. It still contains some hacks and is ICH specific at places. Change-Id: I97dd8096f7db3b62f8f4f4e4d08bdee10d88f689 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/997 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-05-10 20:27:32 +02:00
config SPI_FLASH
bool
Kconfig: introduce writable boot device notion Indicate to the build system that a platform provides support for a writable boot device. The following will provide the necessary support: COMMON_CBFS_SPI_WRAPPER users soc/intel/apollolake soc/intel/baytrail soc/intel/braswell soc/intel/broadwell soc/intel/skylake The SPI_FLASH option is auto-selected if the platform provides write supoprt for the boot device and SPI flash is the boot device. Other platforms may provide similar support, but they do that in a device specific manner such as selecting SPI_FLASH explicitly. This provides clearance against build failures where chipsets don't provide SPI API implementations even though the platform may use a SPI flash to boot. BUG=chrome-os-partner:56151 Change-Id: If78160f231c8312a313f9b9753607d044345d274 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/16211 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Martin Roth <martinroth@google.com>
2016-08-12 22:00:10 +02:00
default y if BOOT_DEVICE_SPI_FLASH && BOOT_DEVICE_SUPPORTS_WRITES
Add SPI flash driver This driver is taken from u-boot and adapted to match coreboot. It still contains some hacks and is ICH specific at places. Change-Id: I97dd8096f7db3b62f8f4f4e4d08bdee10d88f689 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/997 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-05-10 20:27:32 +02:00
default n
help
Select this option if your chipset driver needs to store certain
data in the SPI flash.
SPI: Use common dependency in Kconfig Change-Id: I11118a4fe1e05017349feae004f98a17bb02386b Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/5605 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Idwer Vollering <vidwer@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2014-04-29 06:11:39 +02:00
if SPI_FLASH
Kconfig: rename BOOT_MEDIA_SPI_BUS to BOOT_DEVICE_SPI_FLASH_BUS Provide a default value of 0 in drivers/spi as there weren't default values aside from specific mainboards and arch/x86. Remove any default 0 values while noting to keep the option's default to 0. BUG=chrome-os-partner:56151 Change-Id: If9ef585e011a46b5cd152a03e41d545b36355a61 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/16192 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Martin Roth <martinroth@google.com>
2016-08-11 21:40:09 +02:00
# Keep at 0 because lots of boards assume this default.
config BOOT_DEVICE_SPI_FLASH_BUS
int
default 0
help
Which SPI bus the boot device is connected to.
drivers/spi: provide optional implementation of boot_device_rw() On many x86 platforms the boot device is SPI which is memory mapped. However, in order to write to the boot device one needs to use the SPI api. Therefore, provide a common implementation of boot_device_rw() which has no mmap() functionality. It only reads, writes, and erases. This will be used in the existing infrastructure but in a SPI agnostic way. Two options are added: 1. BOOT_DEVICE_SPI_FLASH_RW_NOMMAP 2. BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY The former is auto-selected when COMMON_CBFS_SPI_WRAPPER is not selected. The latter can be used to include the implementation in the early stages such as bootblock, verstage, and romstage. BUG=chrome-os-partner:56151 Change-Id: I2aa75f88409309e3f9b9bd79b52d27c0061139c8 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/16200 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Martin Roth <martinroth@google.com>
2016-08-12 01:24:54 +02:00
config BOOT_DEVICE_SPI_FLASH_RW_NOMMAP
bool
default y if !COMMON_CBFS_SPI_WRAPPER
default n
depends on BOOT_DEVICE_SPI_FLASH
help
Provide common implementation of the RW boot device that
doesn't provide mmap() operations.
config BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY
bool
default n
depends on BOOT_DEVICE_SPI_FLASH_RW_NOMMAP
help
Include the common implementation in all stages, including the
early ones.
drivers/spi: provide option to not include all flash drivers All flash drivers are automatically included in the build unless COMMON_CBFS_SPI_WRAPPER was selected. However, there are cases where these drivers are unnecessary such as certain intel platforms where spi controller uses hardware sequencing without any ability to manually probe the device. Therefore, provide an option that the SoC can set the default value for. The COMMON_CBFS_SPI_WRAPPER option is still honored by not including all drivers when that is selected. BUG=chrome-os-partner:56151 Change-Id: Ie9aa447da450f7c8717545f05cff800139a9e2dd Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/16187 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-08-11 16:42:27 +02:00
config SPI_FLASH_INCLUDE_ALL_DRIVERS
bool
default n if COMMON_CBFS_SPI_WRAPPER
default y
spi_flash: Differentiate between atomic/manual sequencing This adds a wrapper function and a Kconfig variable to differentiate between SPI controllers which use atomic cycle sequencing versus those where the transaction sequence is controlled manually. Currently this boils down to x86 vs. non-x86. Yes, it's hideous. The current API only worked because, for better or worse, x86 platforms have been homogeneous in this regard since they started using SPI as an alternative to FWH for boot flash. Now that we have non-x86 platforms which use general purpose SPI controllers, we should overhaul the entire SPI infrastructure to be more adaptable. BUG=none BRANCH=none TEST=tested on nyan and link Signed-off-by: David Hendricks <dhendrix@chromium.org> Original-Change-Id: If8ccc9400a9d04772a195941a42bc82d5ecc1958 Original-Reviewed-on: https://chromium-review.googlesource.com/195283 Original-Reviewed-by: David Hendricks <dhendrix@chromium.org> Original-Commit-Queue: David Hendricks <dhendrix@chromium.org> Original-Tested-by: David Hendricks <dhendrix@chromium.org> (cherry picked from commit 4170c59d06206667755402712083452da9fcd941) Signed-off-by: Marc Jones <marc.jones@se-eng.com> Change-Id: I54e2d3d9f9a0153a56f7a51b80f6ee6d997ad358 Reviewed-on: http://review.coreboot.org/7828 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2014-03-22 03:13:34 +01:00
config SPI_ATOMIC_SEQUENCING
bool
default y if ARCH_X86
default n if !ARCH_X86
help
Select this option if the SPI controller uses "atomic sequencing."
Atomic sequencing is when the sequence of commands is pre-programmed
in the SPI controller. Hardware manages the transaction instead of
software. This is common on x86 platforms.
SMM: Add option for SPI driver to be available in SMM - add Kconfig option for CONFIG_SPI_FLASH_SMM - compile subsystem and chip drivers for smm if enabled - change mdelay(1) to udelay(500) since mdelay is not defined in SMM and a 1ms delay is worth avoiding - make flash chip structure non-const so the probe function pointers can be relocated for use in TSEG - Make SMM PCI access possible in southbridge SPI code Change-Id: Icfcbbe8e4e56658769d46af0b5bf6c79a6432641 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: http://review.coreboot.org/1313 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-06-24 01:53:57 +02:00
config SPI_FLASH_SMM
bool "SPI flash driver support in SMM"
default n
SPI: Use common dependency in Kconfig Change-Id: I11118a4fe1e05017349feae004f98a17bb02386b Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/5605 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Idwer Vollering <vidwer@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2014-04-29 06:11:39 +02:00
depends on HAVE_SMI_HANDLER
SMM: Add option for SPI driver to be available in SMM - add Kconfig option for CONFIG_SPI_FLASH_SMM - compile subsystem and chip drivers for smm if enabled - change mdelay(1) to udelay(500) since mdelay is not defined in SMM and a 1ms delay is worth avoiding - make flash chip structure non-const so the probe function pointers can be relocated for use in TSEG - Make SMM PCI access possible in southbridge SPI code Change-Id: Icfcbbe8e4e56658769d46af0b5bf6c79a6432641 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: http://review.coreboot.org/1313 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-06-24 01:53:57 +02:00
help
Select this option if you want SPI flash support in SMM.
spi flash: Organise options list Change-Id: I21e4e2384d9b8bbd34f652e99af11dee993fb41c Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/6173 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-06-30 06:49:55 +02:00
config SPI_FLASH_NO_FAST_READ
bool "Disable Fast Read command"
default n
help
Select this option if your setup requires to avoid "fast read"s
from the SPI flash parts.
config SPI_FLASH_ADESTO
bool
drivers/spi: provide option to not include all flash drivers All flash drivers are automatically included in the build unless COMMON_CBFS_SPI_WRAPPER was selected. However, there are cases where these drivers are unnecessary such as certain intel platforms where spi controller uses hardware sequencing without any ability to manually probe the device. Therefore, provide an option that the SoC can set the default value for. The COMMON_CBFS_SPI_WRAPPER option is still honored by not including all drivers when that is selected. BUG=chrome-os-partner:56151 Change-Id: Ie9aa447da450f7c8717545f05cff800139a9e2dd Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/16187 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-08-11 16:42:27 +02:00
default y if SPI_FLASH_INCLUDE_ALL_DRIVERS
spi flash: Organise options list Change-Id: I21e4e2384d9b8bbd34f652e99af11dee993fb41c Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/6173 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-06-30 06:49:55 +02:00
help
Select this option if your chipset driver needs to store certain
data in the SPI flash and your SPI flash is made by Adesto Technologies.
src/drivers/spi: introduce AMIC support Add support for the AMIC A25L032 flash chip. Change-Id: Ie8d441a923c6fbd18c16440b4571321652d934d5 Signed-off-by: Idwer Vollering <vidwer@gmail.com> Reviewed-on: http://review.coreboot.org/5252 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2014-02-16 01:32:13 +01:00
config SPI_FLASH_AMIC
bool
drivers/spi: provide option to not include all flash drivers All flash drivers are automatically included in the build unless COMMON_CBFS_SPI_WRAPPER was selected. However, there are cases where these drivers are unnecessary such as certain intel platforms where spi controller uses hardware sequencing without any ability to manually probe the device. Therefore, provide an option that the SoC can set the default value for. The COMMON_CBFS_SPI_WRAPPER option is still honored by not including all drivers when that is selected. BUG=chrome-os-partner:56151 Change-Id: Ie9aa447da450f7c8717545f05cff800139a9e2dd Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/16187 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-08-11 16:42:27 +02:00
default y if SPI_FLASH_INCLUDE_ALL_DRIVERS
src/drivers/spi: introduce AMIC support Add support for the AMIC A25L032 flash chip. Change-Id: Ie8d441a923c6fbd18c16440b4571321652d934d5 Signed-off-by: Idwer Vollering <vidwer@gmail.com> Reviewed-on: http://review.coreboot.org/5252 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2014-02-16 01:32:13 +01:00
help
Select this option if your chipset driver needs to store certain
data in the SPI flash and your SPI flash is made by AMIC.
SPI: Add vendor Atmel Change-Id: I60e578003b857f5dcabb2e9bc75aa46acddb62b8 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/7433 Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Tested-by: build bot (Jenkins)
2014-11-11 14:04:38 +01:00
config SPI_FLASH_ATMEL
bool
drivers/spi: provide option to not include all flash drivers All flash drivers are automatically included in the build unless COMMON_CBFS_SPI_WRAPPER was selected. However, there are cases where these drivers are unnecessary such as certain intel platforms where spi controller uses hardware sequencing without any ability to manually probe the device. Therefore, provide an option that the SoC can set the default value for. The COMMON_CBFS_SPI_WRAPPER option is still honored by not including all drivers when that is selected. BUG=chrome-os-partner:56151 Change-Id: Ie9aa447da450f7c8717545f05cff800139a9e2dd Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/16187 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-08-11 16:42:27 +02:00
default y if SPI_FLASH_INCLUDE_ALL_DRIVERS
SPI: Add vendor Atmel Change-Id: I60e578003b857f5dcabb2e9bc75aa46acddb62b8 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/7433 Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Tested-by: build bot (Jenkins)
2014-11-11 14:04:38 +01:00
help
Select this option if your chipset driver needs to store certain
data in the SPI flash and your SPI flash is made by Atmel.
Add SPI flash driver This driver is taken from u-boot and adapted to match coreboot. It still contains some hacks and is ICH specific at places. Change-Id: I97dd8096f7db3b62f8f4f4e4d08bdee10d88f689 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/997 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-05-10 20:27:32 +02:00
config SPI_FLASH_EON
bool
drivers/spi: provide option to not include all flash drivers All flash drivers are automatically included in the build unless COMMON_CBFS_SPI_WRAPPER was selected. However, there are cases where these drivers are unnecessary such as certain intel platforms where spi controller uses hardware sequencing without any ability to manually probe the device. Therefore, provide an option that the SoC can set the default value for. The COMMON_CBFS_SPI_WRAPPER option is still honored by not including all drivers when that is selected. BUG=chrome-os-partner:56151 Change-Id: Ie9aa447da450f7c8717545f05cff800139a9e2dd Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/16187 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-08-11 16:42:27 +02:00
default y if SPI_FLASH_INCLUDE_ALL_DRIVERS
Add SPI flash driver This driver is taken from u-boot and adapted to match coreboot. It still contains some hacks and is ICH specific at places. Change-Id: I97dd8096f7db3b62f8f4f4e4d08bdee10d88f689 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/997 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-05-10 20:27:32 +02:00
help
Select this option if your chipset driver needs to store certain
data in the SPI flash and your SPI flash is made by EON.
spi flash: Organise options list Change-Id: I21e4e2384d9b8bbd34f652e99af11dee993fb41c Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/6173 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-06-30 06:49:55 +02:00
config SPI_FLASH_GIGADEVICE
bool
drivers/spi: provide option to not include all flash drivers All flash drivers are automatically included in the build unless COMMON_CBFS_SPI_WRAPPER was selected. However, there are cases where these drivers are unnecessary such as certain intel platforms where spi controller uses hardware sequencing without any ability to manually probe the device. Therefore, provide an option that the SoC can set the default value for. The COMMON_CBFS_SPI_WRAPPER option is still honored by not including all drivers when that is selected. BUG=chrome-os-partner:56151 Change-Id: Ie9aa447da450f7c8717545f05cff800139a9e2dd Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/16187 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-08-11 16:42:27 +02:00
default y if SPI_FLASH_INCLUDE_ALL_DRIVERS
spi flash: Organise options list Change-Id: I21e4e2384d9b8bbd34f652e99af11dee993fb41c Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/6173 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2014-06-30 06:49:55 +02:00
help
Select this option if your chipset driver needs to store certain
data in the SPI flash and your SPI flash is made by Gigadevice.
Add SPI flash driver This driver is taken from u-boot and adapted to match coreboot. It still contains some hacks and is ICH specific at places. Change-Id: I97dd8096f7db3b62f8f4f4e4d08bdee10d88f689 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/997 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-05-10 20:27:32 +02:00
config SPI_FLASH_MACRONIX
bool
drivers/spi: provide option to not include all flash drivers All flash drivers are automatically included in the build unless COMMON_CBFS_SPI_WRAPPER was selected. However, there are cases where these drivers are unnecessary such as certain intel platforms where spi controller uses hardware sequencing without any ability to manually probe the device. Therefore, provide an option that the SoC can set the default value for. The COMMON_CBFS_SPI_WRAPPER option is still honored by not including all drivers when that is selected. BUG=chrome-os-partner:56151 Change-Id: Ie9aa447da450f7c8717545f05cff800139a9e2dd Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/16187 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-08-11 16:42:27 +02:00
default y if SPI_FLASH_INCLUDE_ALL_DRIVERS
Add SPI flash driver This driver is taken from u-boot and adapted to match coreboot. It still contains some hacks and is ICH specific at places. Change-Id: I97dd8096f7db3b62f8f4f4e4d08bdee10d88f689 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/997 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-05-10 20:27:32 +02:00
help
Select this option if your chipset driver needs to store certain
data in the SPI flash and your SPI flash is made by Macronix.
config SPI_FLASH_SPANSION
bool
drivers/spi: provide option to not include all flash drivers All flash drivers are automatically included in the build unless COMMON_CBFS_SPI_WRAPPER was selected. However, there are cases where these drivers are unnecessary such as certain intel platforms where spi controller uses hardware sequencing without any ability to manually probe the device. Therefore, provide an option that the SoC can set the default value for. The COMMON_CBFS_SPI_WRAPPER option is still honored by not including all drivers when that is selected. BUG=chrome-os-partner:56151 Change-Id: Ie9aa447da450f7c8717545f05cff800139a9e2dd Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/16187 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-08-11 16:42:27 +02:00
default y if SPI_FLASH_INCLUDE_ALL_DRIVERS
Add SPI flash driver This driver is taken from u-boot and adapted to match coreboot. It still contains some hacks and is ICH specific at places. Change-Id: I97dd8096f7db3b62f8f4f4e4d08bdee10d88f689 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/997 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-05-10 20:27:32 +02:00
help
Select this option if your chipset driver needs to store certain
data in the SPI flash and your SPI flash is made by Spansion.
config SPI_FLASH_SST
bool
drivers/spi: provide option to not include all flash drivers All flash drivers are automatically included in the build unless COMMON_CBFS_SPI_WRAPPER was selected. However, there are cases where these drivers are unnecessary such as certain intel platforms where spi controller uses hardware sequencing without any ability to manually probe the device. Therefore, provide an option that the SoC can set the default value for. The COMMON_CBFS_SPI_WRAPPER option is still honored by not including all drivers when that is selected. BUG=chrome-os-partner:56151 Change-Id: Ie9aa447da450f7c8717545f05cff800139a9e2dd Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/16187 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-08-11 16:42:27 +02:00
default y if SPI_FLASH_INCLUDE_ALL_DRIVERS
Add SPI flash driver This driver is taken from u-boot and adapted to match coreboot. It still contains some hacks and is ICH specific at places. Change-Id: I97dd8096f7db3b62f8f4f4e4d08bdee10d88f689 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/997 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-05-10 20:27:32 +02:00
help
Select this option if your chipset driver needs to store certain
data in the SPI flash and your SPI flash is made by SST.
config SPI_FLASH_STMICRO
bool
drivers/spi: provide option to not include all flash drivers All flash drivers are automatically included in the build unless COMMON_CBFS_SPI_WRAPPER was selected. However, there are cases where these drivers are unnecessary such as certain intel platforms where spi controller uses hardware sequencing without any ability to manually probe the device. Therefore, provide an option that the SoC can set the default value for. The COMMON_CBFS_SPI_WRAPPER option is still honored by not including all drivers when that is selected. BUG=chrome-os-partner:56151 Change-Id: Ie9aa447da450f7c8717545f05cff800139a9e2dd Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/16187 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-08-11 16:42:27 +02:00
default y if SPI_FLASH_INCLUDE_ALL_DRIVERS
Add SPI flash driver This driver is taken from u-boot and adapted to match coreboot. It still contains some hacks and is ICH specific at places. Change-Id: I97dd8096f7db3b62f8f4f4e4d08bdee10d88f689 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/997 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-05-10 20:27:32 +02:00
help
Select this option if your chipset driver needs to store certain
data in the SPI flash and your SPI flash is made by ST MICRO.
config SPI_FLASH_WINBOND
bool
drivers/spi: provide option to not include all flash drivers All flash drivers are automatically included in the build unless COMMON_CBFS_SPI_WRAPPER was selected. However, there are cases where these drivers are unnecessary such as certain intel platforms where spi controller uses hardware sequencing without any ability to manually probe the device. Therefore, provide an option that the SoC can set the default value for. The COMMON_CBFS_SPI_WRAPPER option is still honored by not including all drivers when that is selected. BUG=chrome-os-partner:56151 Change-Id: Ie9aa447da450f7c8717545f05cff800139a9e2dd Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/16187 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-08-11 16:42:27 +02:00
default y if SPI_FLASH_INCLUDE_ALL_DRIVERS
Add SPI flash driver This driver is taken from u-boot and adapted to match coreboot. It still contains some hacks and is ICH specific at places. Change-Id: I97dd8096f7db3b62f8f4f4e4d08bdee10d88f689 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/997 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-05-10 20:27:32 +02:00
help
Select this option if your chipset driver needs to store certain
data in the SPI flash and your SPI flash is made by Winbond.
spi: add Kconfig variable for dual-output read enable Add a Kconfig variable so that driver code knows whether or not to use dual-output reads. Signed-off-by: David Hendricks <dhendrix@chromium.org> Old-Change-Id: I31d23bfedd91521d719378ec573e33b381ebd2c5 Reviewed-on: https://chromium-review.googlesource.com/177834 Reviewed-by: David Hendricks <dhendrix@chromium.org> Commit-Queue: David Hendricks <dhendrix@chromium.org> Tested-by: David Hendricks <dhendrix@chromium.org> (cherry picked from commit de6869a3350041c6823427787971efc9fcf469b8) tegra124: implement x2 mode for SPI transfers on CBFS media This implements x2 mode when reading CBFS media over SPI. In theory this effectively doubles our throughput, though the initial results were almost negligibly better. Using a logic analyzer we see a pattern of 12 clocks, ~70ns delay, 4 clocks, ~310ns delay. So if we want to see further gains here then we'll probably need to tune AHB arbitration and utilization to eliminate bubbles/stalls when copying from APB DMA. Signed-off-by: David Hendricks <dhendrix@chromium.org> Old-Change-Id: I33d6ae30923fc42b4dc7103d029085985472cf3e Reviewed-on: https://chromium-review.googlesource.com/177835 Reviewed-by: Tom Warren <twarren@nvidia.com> Reviewed-by: David Hendricks <dhendrix@chromium.org> Commit-Queue: David Hendricks <dhendrix@chromium.org> Tested-by: David Hendricks <dhendrix@chromium.org> (cherry picked from commit 29289223362b12e84da5cbb130f285c6b9d314cc) nyan: turn on dual-output reads for SPI flash Nyan's SPI chip is capable of dual-output reads, so let's use it. Signed-off-by: David Hendricks <dhendrix@chromium.org> Old-Change-Id: I51a97c05aa25442d8ddcc4e3e35a2507d91a64df Reviewed-on: https://chromium-review.googlesource.com/177836 Reviewed-by: David Hendricks <dhendrix@chromium.org> Commit-Queue: David Hendricks <dhendrix@chromium.org> Tested-by: David Hendricks <dhendrix@chromium.org> (cherry picked from commit 62de0889a9cfc5686800645d05e21e272e4beb5c) Squashed three commits to enable dual output spi reads for nyan. Also fixed the spi_xfer interface that has been updated to use bytes instead of bits. Change-Id: I750a177576175b297f61e1b10eac6db15e75aa6e Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com> Reviewed-on: http://review.coreboot.org/6909 Tested-by: build bot (Jenkins) Reviewed-by: David Hendricks <dhendrix@chromium.org>
2013-11-23 03:41:38 +01:00
config SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B
bool
default n
depends on SPI_FLASH
help
Select this option if your SPI flash supports the fast read dual-
output command (opcode 0x3b) where the opcode and address are sent
to the chip on MOSI and data is received on both MOSI and MISO.
spi: Clean up SPI flash driver interface RW flag was added to spi_slave structure to get around a requirement on some AMD flash controllers that need to group together all spi volatile operations (write/erase). This rw flag is not a property or attribute of the SPI slave or controller. Thus, instead of saving it in spi_slave structure, clean up the SPI flash driver interface. This allows chipsets/mainboards (that require volatile operations to be grouped) to indicate beginning and end of such grouped operations. New user APIs are added to allow users to perform probe, read, write, erase, volatile group begin and end operations. Callbacks defined in spi_flash structure are expected to be used only by the SPI flash driver. Any chipset that requires grouping of volatile operations can select the newly added Kconfig option SPI_FLASH_HAS_VOLATILE_GROUP and define callbacks for chipset_volatile_group_{begin,end}. spi_claim_bus/spi_release_bus calls have been removed from the SPI flash chip drivers which end up calling do_spi_flash_cmd since it already has required calls for claiming and releasing SPI bus before performing a read/write operation. BUG=None BRANCH=None TEST=Compiles successfully. Change-Id: Idfc052e82ec15b6c9fa874cee7a61bd06e923fbf Signed-off-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://review.coreboot.org/17462 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-11-21 06:04:00 +01:00
config SPI_FLASH_HAS_VOLATILE_GROUP
bool
default n
help
Allows chipset to group write/erase operations under a single volatile
group.
SPI: Use common dependency in Kconfig Change-Id: I11118a4fe1e05017349feae004f98a17bb02386b Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/5605 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Idwer Vollering <vidwer@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2014-04-29 06:11:39 +02:00
endif # SPI_FLASH
Add EM100 'hyper term' spi console support in ramstage & smm The EM100Pro allows the debug console to be sent over the SPI bus. This is not yet working in romstage due to the use of static variables in the SPI driver code. It is also not working on chipsets that have SPI write buffers of less than 10 characters due to the 9 byte command/header length specified by the EM100 protocol. While this currently works only with the EM100, it seems like it would be useful on any logic analyzer with SPI debug - just filter on command bytes of 0x11. Change-Id: Icd42ccd96cab0a10a4e70f4b02ecf9de8169564b Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: http://review.coreboot.org/11743 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-09-28 23:27:24 +02:00
config HAVE_SPI_CONSOLE_SUPPORT
def_bool n
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