80 lines
2.5 KiB
C
80 lines
2.5 KiB
C
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/*
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* This file is part of the coreboot project.
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*
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* Copyright 2015 Google Inc.
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* Copyright (c) 2015, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc.
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*/
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#ifndef __MAINBOARD_GOOGLE_FOSTER_PMIC_H__
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#define __MAINBOARD_GOOGLE_FOSTER_PMIC_H__
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#define MAX77620_SD0_REG 0x16
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#define MAX77620_SD1_REG 0x17
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#define MAX77620_SD2_REG 0x18
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#define MAX77620_SD3_REG 0x19
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#define MAX77620_CNFG2SD_REG 0x22
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#define MAX77620_CNFG1_L0_REG 0x23
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#define MAX77620_CNFG2_L0_REG 0x24
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#define MAX77620_CNFG1_L1_REG 0x25
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#define MAX77620_CNFG2_L1_REG 0x26
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#define MAX77620_CNFG1_L2_REG 0x27
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#define MAX77620_CNFG2_L2_REG 0x28
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#define MAX77620_CNFG1_L3_REG 0x29
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#define MAX77620_CNFG2_L3_REG 0x2A
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#define MAX77620_CNFG1_L4_REG 0x2B
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#define MAX77620_CNFG2_L4_REG 0x2C
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#define MAX77620_CNFG1_L5_REG 0x2D
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#define MAX77620_CNFG2_L5_REG 0x2E
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#define MAX77620_CNFG1_L6_REG 0x2F
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#define MAX77620_CNFG2_L6_REG 0x30
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#define MAX77620_CNFG1_L7_REG 0x31
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#define MAX77620_CNFG2_L7_REG 0x32
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#define MAX77620_CNFG1_L8_REG 0x33
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#define MAX77620_CNFG2_L8_REG 0x34
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#define MAX77620_CNFG3_LDO_REG 0x35
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#define MAX77620_GPIO0_REG 0x36
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#define MAX77620_GPIO1_REG 0x37
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#define MAX77620_GPIO2_REG 0x38
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#define MAX77620_GPIO3_REG 0x39
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#define MAX77620_GPIO4_REG 0x3A
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#define MAX77620_GPIO5_REG 0x3B
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#define MAX77620_GPIO6_REG 0x3C
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#define MAX77620_GPIO7_REG 0x3D
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#define MAX77620_GPIO_PUE_GPIO 0x3E
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#define MAX77620_GPIO_PDE_GPIO 0x3F
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#define MAX77620_AME_GPIO 0x40
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#define MAX77620_REG_ONOFF_CFG1 0x41
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#define MAX77620_REG_ONOFF_CFG2 0x42
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#define MAX77620_CID0_REG 0x58
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#define MAX77620_CID1_REG 0x59
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#define MAX77620_CID2_REG 0x5A
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#define MAX77620_CID3_REG 0x5B
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#define MAX77620_CID4_REG 0x5C
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#define MAX77620_CID5_REG 0x5D
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#define MAX77621_VOUT_REG 0x00
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#define MAX77621_VOUT_DVC_REG 0x01
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void pmic_init(unsigned bus);
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void pmic_write_reg_77620(unsigned bus, uint8_t reg, uint8_t val,
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int delay);
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#endif /* __MAINBOARD_GOOGLE_FOSTER_PMIC_H__ */
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