2019-09-24 02:23:02 +02:00
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/* SPDX-License-Identifier: GPL-2.0-only */
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/* This file is part of the coreboot project. */
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2015-04-16 02:03:26 +02:00
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#include "sata.h"
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#include <arch/acpi.h>
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#include <arch/acpigen.h>
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/* e.g.
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* generate_sata_ssdt_ports("\_SB.PCI0.SATA", 0x3);
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* generates:
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* Scope (\_SB.PCI0.SATA)
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* {
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* Device (PR00)
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* {
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* Name (_ADR, 0x0000FFFF) // _ADR: Address
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* }
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*
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* Device (PR01)
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* {
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* Name (_ADR, 0x0001FFFF) // _ADR: Address
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* }
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* }
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*
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*/
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void generate_sata_ssdt_ports(const char *scope, uint32_t enable_map)
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{
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int i;
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uint32_t bit;
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char port_name[4] = "PR00";
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acpigen_write_scope(scope);
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/* generate a device for every enabled port */
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for (i = 0; i < 32; i++) {
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bit = 1 << i;
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if (!(bit & enable_map))
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continue;
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port_name[2] = '0' + i / 10;
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port_name[3] = '0' + i % 10;
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acpigen_write_device(port_name);
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acpigen_write_name_dword("_ADR", 0xffff + i * 0x10000);
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acpigen_pop_len(); /* close PRT%d */
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}
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acpigen_pop_len(); /* close scope */
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}
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