2021-11-10 18:35:31 +01:00
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coreboot 4.15
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2021-05-10 23:24:07 +02:00
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================================
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2021-11-10 18:35:31 +01:00
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coreboot 4.15 was released on November 5th, 2021.
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2021-05-10 23:24:07 +02:00
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2021-11-05 19:20:15 +01:00
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Since 4.14 there have been more than 2597 new commits by more than 219 developers.
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2021-10-18 16:04:09 +02:00
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Of these, over 73 contributed to coreboot for the first time.
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2021-05-10 23:24:07 +02:00
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2021-10-18 16:04:09 +02:00
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Welcome to the project!
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Thank you to all the developers who continue to make coreboot the
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great open source firmware project that it is.
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2021-11-05 19:20:15 +01:00
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Important Announcement
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----------------------
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We are going to be changing the cadence from every 6 months, to every 3 months.
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That means the 4.16 release will be coming in February, 2022.
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2021-10-18 16:04:09 +02:00
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New mainboards
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--------------
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* Asus p8h61-m_pro_cm6630
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* Asus p8h77-v
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* Asus p8z77-v
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* Google nipperkin
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* Lenovo w541
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* Siemens mc_ehl
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2022-03-01 01:59:04 +01:00
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* Supermicro x9sae
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2021-10-18 16:04:09 +02:00
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* System76 addw1
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2021-11-02 21:57:03 +01:00
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* System76 addw2
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* System76 bonw14
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2021-10-18 16:04:09 +02:00
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* System76 darp6
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* System76 darp7
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2021-11-02 21:57:03 +01:00
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* System76 galp2
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* System76 galp3
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* System76 galp3-b
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2021-10-18 16:04:09 +02:00
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* System76 galp4
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* System76 galp5
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2021-11-02 21:57:03 +01:00
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* System76 gaze14
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2021-10-18 16:04:09 +02:00
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* System76 lemp10
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2021-11-02 21:57:03 +01:00
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* System76 oryp7
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* System76 oryp8
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2021-10-18 16:04:09 +02:00
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Removed mainboards
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------------------
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* Google Mancomb
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Deprecations and incompatible changes
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-------------------------------------
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### COREBOOTPAYLOAD option
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Drop the deprecated COREBOOTPAYLOAD option, and replace it with MrChromebox's
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updated UefiPayloadPkg option. Simplify the Kconfig options to make it easier
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to build from upstream edk2 master. Drop the TIANOCORE_USE_8254_TIMER Kconfig
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2021-10-31 04:21:29 +01:00
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option since it applies only to CorebootPayloadPkg. Clean up the Makefile now
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2021-10-18 16:04:09 +02:00
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that we're only building from a single Tianocore package/target.
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### Remove old lp4x and ddr4 versions of spd_tools
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The migration to the new unified version of spd_tools is complete, so
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the old lp4x and ddr4 versions can be removed.
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### Remove AMD PI 00630F01
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No board currently uses AMD PI 00630F01 so remove it.
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2021-05-10 23:24:07 +02:00
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Significant changes
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-------------------
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2021-05-19 23:07:08 +02:00
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### Merged family of Asus mainboards using H61 chipset
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By using newer coreboot features like board variants and override devicetrees,
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lots of code can now be shared. This should ease maintenance and also make it
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easier for newcomers to add support for even more mainboards.
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2021-08-13 08:31:52 +02:00
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### Changed default setting for Intel chipset lockdown
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Previously, the default behaviour for Intel chipset lockdown was to let the FSP
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do it. Since all related mainboards used the coreboot mechanisms for chipset
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lockdown, the default behaviour was changed to that.
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2021-10-21 12:54:36 +02:00
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### Payloads unit testing
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Libpayload now supports the mock architecture, which can be used for unit testing
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payloads. (For examples see
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[depthcharge](https://chromium.googlesource.com/chromiumos/platform/depthcharge/)
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payload)
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### Unit testing infrastructure
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Unit testing of libpayload is now possible in the same fashion as in the main
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coreboot tree.
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2021-08-13 08:31:52 +02:00
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2021-10-18 16:04:09 +02:00
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### Introduce new method for accessing cpu_info
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There is currently a fundamental flaw in the current cpu_info()
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implementation. It assumes that current stack is CONFIG_STACK_SIZE
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aligned. This assumption breaks down when performing SMM relocation.
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The first step in performing SMM relocation is changing the SMBASE. This
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is accomplished by installing the smmstub at 0x00038000, which is the
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default SMM entry point. The stub is configured to set up a new stack
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with the size of 1 KiB (CONFIG_SMM_STUB_STACK_SIZE), and an entry point
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of smm_do_relocation located in RAMSTAGE RAM.
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This means that when smm_do_relocation is executed, it is running in SMM
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with a different sized stack. When cpu_info() gets called it will be
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using CONFIG_STACK_SIZE to calculate the location of the cpu_info
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struct. This results in reading random memory. Since cpu_info() has to
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run in multiple environments, we can't use a compile time constant to
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locate the cpu_info struct.
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This CL introduces a new way of locating cpu_info. It uses a per-cpu
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segment descriptor that points to a per-cpu segment that is allocated on
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the stack. By using a segment descriptor to point to the per-cpu data,
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we no longer need to calculate the location of the cpu_info struct. This
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has the following advantages:
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* Stacks no longer need to be CONFIG_STACK_SIZE aligned.
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* Accessing an unconfigured segment will result in an exception. This
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ensures no one can call cpu_info() from an unsupported environment.
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* Segment selectors are cleared when entering SMM and restored when
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leaving SMM.
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* There is a 1:1 mapping between cpu and cpu_info. When using
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COOP_MULTITASKING, a new cpu_info is currently allocated at the top of
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each thread's stack. This no longer needs to happen.
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