156 lines
4 KiB
C
156 lines
4 KiB
C
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2008 Advanced Micro Devices, Inc.
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* Copyright (C) 2008-2009 coresystems GmbH
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* Copyright (C) 2014 Google Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <console/console.h>
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#include <device/device.h>
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#include <device/pci.h>
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#include <device/pci_ids.h>
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#include <device/pci_ops.h>
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#include <arch/io.h>
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#include <delay.h>
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#include <soc/intel/common/hda_verb.h>
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#include <broadwell/ramstage.h>
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#include <broadwell/rcba.h>
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const u32 * cim_verb_data = NULL;
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u32 cim_verb_data_size = 0;
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const u32 * pc_beep_verbs = NULL;
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u32 pc_beep_verbs_size = 0;
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static void codecs_init(u32 base, u32 codec_mask)
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{
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int i;
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/* Can support up to 4 codecs */
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for (i = 3; i >= 0; i--) {
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if (codec_mask & (1 << i))
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hda_codec_init(base, i,
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cim_verb_data_size,
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cim_verb_data);
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}
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if (pc_beep_verbs_size && pc_beep_verbs)
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hda_codec_write(base, pc_beep_verbs_size, pc_beep_verbs);
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}
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static void hda_pch_init(struct device *dev, u32 base)
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{
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u8 reg8;
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u16 reg16;
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u32 reg32;
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if (RCBA32(0x2030) & (1 << 31)) {
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reg32 = pci_read_config32(dev, 0x120);
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reg32 &= 0xf8ffff01;
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reg32 |= (1 << 25);
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reg32 |= RCBA32(0x2030) & 0xfe;
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pci_write_config32(dev, 0x120, reg32);
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} else
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printk(BIOS_DEBUG, "HDA: V1CTL disabled.\n");
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reg32 = pci_read_config32(dev, 0x114);
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reg32 &= ~0xfe;
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pci_write_config32(dev, 0x114, reg32);
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// Set VCi enable bit
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if (pci_read_config32(dev, 0x120) & ((1 << 24) |
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(1 << 25) | (1 << 26))) {
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reg32 = pci_read_config32(dev, 0x120);
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reg32 &= ~(1 << 31);
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pci_write_config32(dev, 0x120, reg32);
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}
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reg8 = pci_read_config8(dev, 0x43);
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reg8 &= ~(1 << 6);
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pci_write_config8(dev, 0x43, reg8);
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/* Additional programming steps */
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reg32 = pci_read_config32(dev, 0xc4);
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reg32 |= (1 << 24);
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pci_write_config32(dev, 0xc4, reg32);
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reg8 = pci_read_config8(dev, 0x40); // Audio Control
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reg8 |= 1; // Select HDA mode
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pci_write_config8(dev, 0x40, reg8);
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reg8 = pci_read_config8(dev, 0x4d); // Docking Status
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reg8 &= ~(1 << 7); // Docking not supported
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pci_write_config8(dev, 0x4d, reg8);
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reg16 = read32(base + 0x0012);
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reg16 |= (1 << 0);
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write32(base + 0x0012, reg16);
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/* disable Auto Voltage Detector */
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reg8 = pci_read_config8(dev, 0x42);
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reg8 |= (1 << 2);
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pci_write_config8(dev, 0x42, reg8);
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}
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static void hda_init(struct device *dev)
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{
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u32 base;
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struct resource *res;
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u32 codec_mask;
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u32 reg32;
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/* Find base address */
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res = find_resource(dev, PCI_BASE_ADDRESS_0);
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if (!res)
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return;
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base = (u32)res->base;
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printk(BIOS_DEBUG, "HDA: base = %08x\n", (u32)base);
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/* Set Bus Master */
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reg32 = pci_read_config32(dev, PCI_COMMAND);
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pci_write_config32(dev, PCI_COMMAND, reg32 | PCI_COMMAND_MASTER);
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hda_pch_init(dev, base);
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codec_mask = hda_codec_detect(base);
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if (codec_mask) {
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printk(BIOS_DEBUG, "HDA: codec_mask = %02x\n", codec_mask);
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codecs_init(base, codec_mask);
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}
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}
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static struct device_operations hda_ops = {
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.read_resources = &pci_dev_read_resources,
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.set_resources = &pci_dev_set_resources,
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.enable_resources = &pci_dev_enable_resources,
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.init = &hda_init,
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.ops_pci = &broadwell_pci_ops,
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};
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static const unsigned short pci_device_ids[] = {
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0x9c20, /* LynxPoint-LP */
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0x9ca0, /* WildcatPoint */
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0
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};
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static const struct pci_driver pch_hda __pci_driver = {
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.ops = &hda_ops,
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.vendor = PCI_VENDOR_ID_INTEL,
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.devices = pci_device_ids,
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};
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