2015-05-13 03:19:47 +02:00
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2014 Google Inc.
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2015-05-13 03:23:27 +02:00
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* Copyright (C) 2015 Intel Corporation.
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2015-05-13 03:19:47 +02:00
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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2015-05-13 03:23:27 +02:00
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* Foundation, Inc.
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2015-05-13 03:19:47 +02:00
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*/
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2015-07-03 21:26:32 +02:00
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/* PCR Register Access Methods PCR Dword Read arg0: PID arg1: Offset */
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Method (PCRR, 2, Serialized)
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2015-05-13 03:19:47 +02:00
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{
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2015-07-03 21:26:32 +02:00
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Add (ShiftLeft (Arg0, PCR_PORTID_SHIFT), Arg1, Local0)
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Add (PCH_PCR_BASE_ADDRESS, Local0, Local0)
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OperationRegion (PCR0, SystemMemory, Local0, 0x4)
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Field(PCR0, DWordAcc, Lock, Preserve)
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2015-05-13 03:19:47 +02:00
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{
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2015-07-03 21:26:32 +02:00
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Offset(0x00),
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DAT0, 32
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2015-05-13 03:19:47 +02:00
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}
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2015-07-03 21:26:32 +02:00
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Return (DAT0)
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}
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Device (GPIO)
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{
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/* GPIO Controller */
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Name (_HID, "INT344B")
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2015-05-13 03:19:47 +02:00
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Name (_UID, 1)
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Name (RBUF, ResourceTemplate()
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{
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2015-07-03 21:26:32 +02:00
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Memory32Fixed (ReadWrite, 0, GPIO_BASE_SIZE, _R0)
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Memory32Fixed (ReadWrite, 0, GPIO_BASE_SIZE, _R1)
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Memory32Fixed (ReadWrite, 0, GPIO_BASE_SIZE, _R3)
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Interrupt (ResourceConsumer, Level, ActiveLow, Shared, ,, _R4)
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{
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GPIO_IRQ14,
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}
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2015-05-13 03:19:47 +02:00
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})
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2015-07-03 21:26:32 +02:00
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Method (_CRS, 0, NotSerialized) /* _CRS: Current Resource Settings */
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2015-05-13 03:19:47 +02:00
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{
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2015-07-03 21:26:32 +02:00
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CreateDWordField (^RBUF, ^_R0._BAS, COM0)
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CreateDWordField (^RBUF, ^_R1._BAS, COM1)
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CreateDWordField (^RBUF, ^_R3._BAS, COM3)
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CreateDWordField (^RBUF, ^_R4._INT, IRQN)
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Store (Add (PCH_PCR_BASE_ADDRESS,
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ShiftLeft (PID_GPIOCOM0, PCR_PORTID_SHIFT)), COM0)
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Store (Add (PCH_PCR_BASE_ADDRESS,
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ShiftLeft (PID_GPIOCOM1, PCR_PORTID_SHIFT)), COM1)
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Store (Add (PCH_PCR_BASE_ADDRESS,
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ShiftLeft (PID_GPIOCOM3, PCR_PORTID_SHIFT)), COM3)
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Store (And (PCRR (PID_GPIOCOM0, MISCCFG_OFFSET),
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GPIO_DRIVER_IRQ_ROUTE_MASK), Local0)
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If (LEqual (Local0, GPIO_DRIVER_IRQ_ROUTE_IRQ14)) {
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Store (GPIO_IRQ14, IRQN)
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} Else {
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Store (GPIO_IRQ15, IRQN)
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}
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2015-05-13 03:19:47 +02:00
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Return (RBUF)
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}
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Method (_STA, 0, NotSerialized)
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{
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Return (0xF)
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}
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}
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