2017-10-28 12:58:08 +02:00
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2017 Hal Martin <hal.martin@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#define BRIGHTNESS_UP \_SB.PCI0.GFX0.INCB
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#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.DECB
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#define ACPI_VIDEO_DEVICE \_SB.PCI0.GFX0
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DefinitionBlock(
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"dsdt.aml",
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"DSDT",
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2018-11-13 14:23:29 +01:00
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0x02, // DSDT revision: ACPI v2.0 and up
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2017-10-28 12:58:08 +02:00
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"COREv4", // OEM id
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"COREBOOT", // OEM table id
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0x20141018 // OEM revision
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)
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{
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// Some generic macros
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#include "acpi/platform.asl"
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#include <cpu/intel/model_206ax/acpi/cpu.asl>
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#include <southbridge/intel/bd82x6x/acpi/platform.asl>
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/* global NVS and variables. */
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#include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
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#include <southbridge/intel/bd82x6x/acpi/sleepstates.asl>
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Scope (\_SB) {
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Device (PCI0)
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{
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#include <northbridge/intel/sandybridge/acpi/sandybridge.asl>
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#include <drivers/intel/gma/acpi/default_brightness_levels.asl>
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#include <southbridge/intel/bd82x6x/acpi/pch.asl>
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}
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}
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}
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