coreboot-kgpe-d16/src/cpu/intel/model_f0x/Makefile.inc

ramstage-y += model_f0x_init.c

cpu_microcode-$(CONFIG_CPU_MICROCODE_CBFS_GENERATE) += microcode_blob.c
Get rid of drivers class The use of ramstage.a required the build system to handle some object files in a special way, which were put in the drivers class. These object files didn't provide any symbols that were used directly (but only via linker magic), and so the linker never considered them for inclusion. With ramstage.a gone, we can drop this special class, too. Change-Id: I6f1369e08d7d12266b506a5597c3a139c5c41a55 Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/1872 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> 2012-11-16 14:50:32 +01:00			`ramstage-y += model_f0x_init.c`
cpu/intel: Make all Intel CPUs load microcode from CBFS The sequence to inject microcode updates is virtually the same for all Intel CPUs. The same function is used to inject the update in both CBFS and hardcoded cases, and in both of these cases, the microcode resides in the ROM. This should be a safe change across the board. The function which loaded compiled-in microcode is also removed here in order to prevent it from being used in the future. The dummy terminators from microcode need to be removed if this change is to work when generating microcode from several microcode_blob.c files, as is the case for older socketed CPUs. Removal of dummy terminators is done in a subsequent patch. Change-Id: I2cc8220cc4cd4a87aa7fc750e6c60ccdfa9986e9 Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-on: http://review.coreboot.org/4495 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@gmail.com> 2013-12-07 06:14:54 +01:00
			`cpu_microcode-$(CONFIG_CPU_MICROCODE_CBFS_GENERATE) += microcode_blob.c`