114 lines
3 KiB
C
114 lines
3 KiB
C
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/*
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* Copyright 2011, Marvell Semiconductor Inc.
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* Lei Wen <leiwen@marvell.com>
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*
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* Copyright 2017 Intel Corporation
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*
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* Secure Digital (SD) Host Controller interface specific code
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <console/console.h>
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#include <device/sd_mmc_ctrlr.h>
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#include <device/sdhci.h>
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#include <device/storage.h>
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#include "sdhci.h"
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#include "sd_mmc.h"
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#include "storage.h"
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static void sdhci_display_bus_width(struct sdhci_ctrlr *sdhci_ctrlr)
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{
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if (IS_ENABLED(CONFIG_SDHC_DEBUG)) {
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int bits;
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uint8_t host_ctrl;
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uint16_t host2;
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const char *rate;
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uint16_t timing;
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/* Display the bus width */
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host_ctrl = sdhci_readb(sdhci_ctrlr, SDHCI_HOST_CONTROL);
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host2 = sdhci_readw(sdhci_ctrlr, SDHCI_HOST_CONTROL2);
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timing = host2 & SDHCI_CTRL_UHS_MASK;
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bits = 1;
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if (host_ctrl & SDHCI_CTRL_8BITBUS)
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bits = 8;
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else if (host_ctrl & SDHCI_CTRL_4BITBUS)
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bits = 4;
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rate = "SDR";
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if ((timing == SDHCI_CTRL_UHS_DDR50)
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|| (timing == SDHCI_CTRL_HS400))
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rate = "DDR";
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sdhc_debug("SDHCI bus width: %d bit%s %s\n", bits,
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(bits != 1) ? "s" : "", rate);
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}
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}
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static void sdhci_display_clock(struct sdhci_ctrlr *sdhci_ctrlr)
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{
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if (IS_ENABLED(CONFIG_SDHC_DEBUG)) {
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uint16_t clk_ctrl;
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uint32_t clock;
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uint32_t divisor;
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/* Display the clock */
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clk_ctrl = sdhci_readw(sdhci_ctrlr, SDHCI_CLOCK_CONTROL);
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sdhc_debug("SDHCI bus clock: ");
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if (clk_ctrl & SDHCI_CLOCK_CARD_EN) {
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divisor = (clk_ctrl >> SDHCI_DIVIDER_SHIFT)
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& SDHCI_DIV_MASK;
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divisor |= ((clk_ctrl >> SDHCI_DIVIDER_SHIFT)
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<< SDHCI_DIV_MASK_LEN) & SDHCI_DIV_HI_MASK;
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divisor <<= 1;
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clock = sdhci_ctrlr->sd_mmc_ctrlr.clock_base;
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if (divisor)
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clock /= divisor;
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sdhc_debug("%d.%03d MHz\n", clock / 1000000,
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(clock / 1000) % 1000);
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} else
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sdhc_debug("Off\n");
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}
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}
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static void sdhci_display_voltage(struct sdhci_ctrlr *sdhci_ctrlr)
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{
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if (IS_ENABLED(CONFIG_SDHC_DEBUG)) {
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u8 pwr_ctrl;
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const char *voltage;
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const char *voltage_table[8] = {
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"Unknown", /* 0 */
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"Unknown", /* 1 */
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"Unknown", /* 2 */
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"Unknown", /* 3 */
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"Unknown", /* 4 */
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"1.8", /* 5 */
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"3.0", /* 6 */
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"3.3", /* 7 */
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};
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pwr_ctrl = sdhci_readb(sdhci_ctrlr, SDHCI_POWER_CONTROL);
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if (pwr_ctrl & SDHCI_POWER_ON) {
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voltage = voltage_table[(pwr_ctrl & SDHCI_POWER_330)
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>> 1];
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sdhc_debug("SDHCI voltage: %s Volts\n", voltage);
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} else
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sdhc_debug("SDHCI voltage: Off\n");
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}
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}
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void sdhci_display_setup(struct sdhci_ctrlr *sdhci_ctrlr)
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{
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/* Display the controller setup */
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sdhci_display_voltage(sdhci_ctrlr);
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sdhci_display_clock(sdhci_ctrlr);
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sdhci_display_bus_width(sdhci_ctrlr);
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}
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