53 lines
1.4 KiB
Text
53 lines
1.4 KiB
Text
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##
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## This file is part of the coreboot project.
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##
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## Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; either version 2 of the License, or
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## (at your option) any later version.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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## You should have received a copy of the GNU General Public License
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## along with this program; if not, write to the Free Software
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## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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##
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config BOARD_ASI_MB_5BLMP
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bool "MB-5BLMP"
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select ARCH_X86
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select CPU_AMD_GX1
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select NORTHBRIDGE_AMD_GX1
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select SOUTHBRIDGE_AMD_CS5530
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select SUPERIO_NSC_PC87351
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select HAVE_PIRQ_TABLE
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select PIRQ_ROUTE
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select UDELAY_TSC
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select TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
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config MAINBOARD_DIR
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string
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default asi/mb_5blmp
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depends on BOARD_ASI_MB_5BLMP
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config MAINBOARD_PART_NUMBER
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string
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default "MB-5BLMP"
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depends on BOARD_ASI_MB_5BLMP
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config HAVE_OPTION_TABLE
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bool
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default n
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depends on BOARD_ASI_MB_5BLMP
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config IRQ_SLOT_COUNT
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int
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default 5
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depends on BOARD_ASI_MB_5BLMP
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