nb/amd/pi/00730F01: introduce and use chipset devicetree
BKDG #52740 Rev 3.05 was used as a reference for the SoC's various PCI devices. The HDA controller in the FCH at function 2 of device 0x14 on bus 0 was missing in the mainboard's devicetrees. TEST=PC Engines APU2 still boots and doesn't show any new problems Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I6970c2f6e6d661d40406586f4e6eeb05bcd07979 Reviewed-on: https://review.coreboot.org/c/coreboot/+/79083 Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
This commit is contained in:
Felix Held
parent
10e478c4cf
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0010b89c67
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@ -1,32 +1,22 @@
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# SPDX-License-Identifier: GPL-2.0-only
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chip northbridge/amd/pi/00730F01/root_complex
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device cpu_cluster 0 on end
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device domain 0 on
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subsystemid 0x1022 0x1410 inherit
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chip northbridge/amd/pi/00730F01
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device pci 0.0 on end # Root Complex
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device pci 0.2 on end # IOMMU
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device pci 1.0 off end # Internal Graphics P2P bridge 0x9804
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device pci 1.1 off end # Internal Multimedia
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device pci 2.0 on end # PCIe Host Bridge
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device pci 2.1 on end # mPCIe slot 2 (on GFX lane)
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device pci 2.2 on end # LAN3
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device pci 2.3 on end # LAN2
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device pci 2.4 on end # LAN1
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device pci 2.5 on end # mPCIe slot 1
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device pci 8.0 on end # Platform Security Processor
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end #chip northbridge/amd/pi/00730F01
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device ref iommu on end
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device ref gpp_bridge_0 on end # mPCIe slot 2 (on GFX lane)
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device ref gpp_bridge_1 on end # LAN3
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device ref gpp_bridge_2 on end # LAN2
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device ref gpp_bridge_3 on end # LAN1
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device ref gpp_bridge_4 on end # mPCIe slot 1
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end
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chip southbridge/amd/pi/hudson
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device pci 10.0 on end # XHCI HC0 muxed with EHCI 2
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device pci 11.0 on end # SATA
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device pci 12.0 off end # USB EHCI0 usb[0:3] not connected
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device pci 13.0 on end # USB EHCI1 usb[4:7]
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device pci 14.0 on end # SM
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device pci 14.3 on # LPC 0x439d
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device ref xhci on end # XHCI HC0 muxed with EHCI 2
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device ref sata on end
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device ref ehci_1 on end # USB EHCI1 usb[4:7]
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device ref lpc_bridge on
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chip superio/nuvoton/nct5104d # SIO NCT5104D
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register "irq_trigger_type" = "0"
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register "reset_gpios" = "1"
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@ -62,18 +52,9 @@ chip northbridge/amd/pi/00730F01/root_complex
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chip drivers/pc80/tpm
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device pnp 0c31.0 on end
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end # LPC TPM
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end # LPC 0x439d
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device pci 14.7 on end # SD
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device pci 16.0 on end # USB EHCI2 usb[8:7] - muxed with XHCI
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end #chip southbridge/amd/pi/hudson
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device pci 18.0 on end
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device pci 18.1 on end
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device pci 18.2 on end
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device pci 18.3 on end
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device pci 18.4 on end
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device pci 18.5 on end
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end #domain
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end #northbridge/amd/pi/00730F01/root_complex
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end
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device ref sdhci on end
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device ref ehci_2 on end # USB EHCI2 usb[8:7] - muxed with XHCI
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end
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end
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end
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@ -1,32 +1,23 @@
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# SPDX-License-Identifier: GPL-2.0-only
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chip northbridge/amd/pi/00730F01/root_complex
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device cpu_cluster 0 on end
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device domain 0 on
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subsystemid 0x1022 0x1410 inherit
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chip northbridge/amd/pi/00730F01
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device pci 0.0 on end # Root Complex
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device pci 0.2 on end # IOMMU
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device pci 1.0 off end # Internal Graphics P2P bridge 0x9804
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device pci 1.1 off end # Internal Multimedia
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device pci 2.0 on end # PCIe Host Bridge
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device pci 2.1 on end # mPCIe slot 2 (on GFX lane)
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device pci 2.2 on end # LAN3
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device pci 2.3 on end # LAN2
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device pci 2.4 on end # LAN1
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device pci 2.5 on end # mPCIe slot 1
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device pci 8.0 on end # Platform Security Processor
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end #chip northbridge/amd/pi/00730F01
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device ref iommu on end
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device ref gpp_bridge_0 on end # mPCIe slot 2 (on GFX lane)
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device ref gpp_bridge_1 on end # LAN3
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device ref gpp_bridge_2 on end # LAN2
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device ref gpp_bridge_3 on end # LAN1
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device ref gpp_bridge_4 on end # mPCIe slot 1
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end
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chip southbridge/amd/pi/hudson # it is under NB/SB Link, but on the same pci bus
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device pci 10.0 on end # XHCI HC0 muxed with EHCI 2
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device pci 11.0 on end # SATA
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device pci 12.0 on end # USB EHCI0 usb[0:3] is connected
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device pci 13.0 on end # USB EHCI1 usb[4:7]
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device pci 14.0 on end # SM
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device pci 14.3 on # LPC 0x439d
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device ref xhci on end # XHCI HC0 muxed with EHCI 2
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device ref sata on end
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device ref ehci_0 on end # USB EHCI0 usb[0:3] is connected
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device ref ehci_1 on end # USB EHCI1 usb[4:7]
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device ref lpc_bridge on
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chip superio/nuvoton/nct5104d # SIO NCT5104D
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register "irq_trigger_type" = "0"
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register "reset_gpios" = "1"
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@ -58,19 +49,10 @@ chip northbridge/amd/pi/00730F01/root_complex
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device pnp 2e.107 on end
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device pnp 2e.607 off end
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device pnp 2e.f on end
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end # SIO NCT5104D
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end # LPC 0x439d
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device pci 14.7 on end # SD
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device pci 16.0 on end # USB EHCI2 usb[8:7] - muxed with XHCI
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end #chip southbridge/amd/pi/hudson
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device pci 18.0 on end
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device pci 18.1 on end
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device pci 18.2 on end
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device pci 18.3 on end
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device pci 18.4 on end
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device pci 18.5 on end
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end #domain
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end #northbridge/amd/pi/00730F01/root_complex
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end
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end
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device ref sdhci on end
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device ref ehci_2 on end # USB EHCI2 usb[8:7] - muxed with XHCI
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end
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end
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end
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@ -1,32 +1,23 @@
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# SPDX-License-Identifier: GPL-2.0-only
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chip northbridge/amd/pi/00730F01/root_complex
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device cpu_cluster 0 on end
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device domain 0 on
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subsystemid 0x1022 0x1410 inherit
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chip northbridge/amd/pi/00730F01
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device pci 0.0 on end # Root Complex
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device pci 0.2 on end # IOMMU
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device pci 1.0 off end # Internal Graphics P2P bridge 0x9804
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device pci 1.1 off end # Internal Multimedia
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device pci 2.0 on end # PCIe Host Bridge
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device pci 2.1 on end # LAN1
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device pci 2.2 on end # LAN2
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device pci 2.3 on end # LAN3
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device pci 2.4 on end # LAN4
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device pci 2.5 on end # mPCIe slot 1
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device pci 8.0 on end # Platform Security Processor
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end #chip northbridge/amd/pi/00730F01
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device ref iommu on end
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device ref gpp_bridge_0 on end # LAN1
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device ref gpp_bridge_1 on end # LAN2
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device ref gpp_bridge_2 on end # LAN3
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device ref gpp_bridge_3 on end # LAN4
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device ref gpp_bridge_4 on end # mPCIe slot 1
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end
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chip southbridge/amd/pi/hudson
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device pci 10.0 on end # XHCI HC0 muxed with EHCI 2
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device pci 11.0 on end # SATA
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device pci 12.0 on end # USB EHCI0 usb[0:3] is connected
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device pci 13.0 on end # USB EHCI1 usb[4:7]
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device pci 14.0 on end # SM
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device pci 14.3 on # LPC 0x439d
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device ref xhci on end # XHCI HC0 muxed with EHCI 2
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device ref sata on end
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device ref ehci_0 on end # USB EHCI0 usb[0:3] is connected
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device ref ehci_1 on end # USB EHCI1 usb[4:7]
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device ref lpc_bridge on
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chip superio/nuvoton/nct5104d # SIO NCT5104D
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register "irq_trigger_type" = "0"
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register "reset_gpios" = "1"
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@ -59,18 +50,9 @@ chip northbridge/amd/pi/00730F01/root_complex
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device pnp 2e.607 off end
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device pnp 2e.f on end
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end # SIO NCT5104D
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end # LPC 0x439d
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device pci 14.7 on end # SD
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device pci 16.0 on end # USB EHCI2 usb[8:7] - muxed with XHCI
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end #chip southbridge/amd/pi/hudson
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device pci 18.0 on end
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device pci 18.1 on end
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device pci 18.2 on end
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device pci 18.3 on end
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device pci 18.4 on end
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device pci 18.5 on end
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end #domain
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end #northbridge/amd/pi/00730F01/root_complex
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end
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device ref sdhci on end
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device ref ehci_2 on end # USB EHCI2 usb[8:7] - muxed with XHCI
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end
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end
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end
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@ -1,32 +1,23 @@
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# SPDX-License-Identifier: GPL-2.0-only
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chip northbridge/amd/pi/00730F01/root_complex
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device cpu_cluster 0 on end
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device domain 0 on
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subsystemid 0x1022 0x1410 inherit
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chip northbridge/amd/pi/00730F01 # PCI side of HT root complex
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device pci 0.0 on end # Root Complex
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device pci 0.2 on end # IOMMU
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device pci 1.0 off end # Internal Graphics P2P bridge 0x9804
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device pci 1.1 off end # Internal Multimedia
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device pci 2.0 on end # PCIe Host Bridge
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device pci 2.1 on end # mPCIe slot 2 (on GFX lane)
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device pci 2.2 on end # LAN3
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device pci 2.3 on end # LAN2
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device pci 2.4 on end # LAN1
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device pci 2.5 on end # mPCIe slot 1
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device pci 8.0 on end # Platform Security Processor
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end #chip northbridge/amd/pi/00730F01
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chip northbridge/amd/pi/00730F01
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device ref iommu on end
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device ref gpp_bridge_0 on end # mPCIe slot 2 (on GFX lane)
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device ref gpp_bridge_1 on end # LAN3
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device ref gpp_bridge_2 on end # LAN2
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device ref gpp_bridge_3 on end # LAN1
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device ref gpp_bridge_4 on end # mPCIe slot 1
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end
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chip southbridge/amd/pi/hudson # it is under NB/SB Link, but on the same pci bus
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device pci 10.0 on end # XHCI HC0 muxed with EHCI 2
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device pci 11.0 on end # SATA
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device pci 12.0 on end # USB EHCI0 usb[0:3] is connected
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device pci 13.0 on end # USB EHCI1 usb[4:7]
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device pci 14.0 on end # SM
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device pci 14.3 on # LPC 0x439d
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device ref xhci on end # XHCI HC0 muxed with EHCI 2
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device ref sata on end
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device ref ehci_0 on end # USB EHCI0 usb[0:3] is connected
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device ref ehci_1 on end # USB EHCI1 usb[4:7]
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device ref lpc_bridge on
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chip superio/nuvoton/nct5104d # SIO NCT5104D
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register "irq_trigger_type" = "0"
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device pnp 2e.0 off end
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@ -58,18 +49,8 @@ chip northbridge/amd/pi/00730F01/root_complex
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chip drivers/pc80/tpm
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device pnp 0c31.0 on end
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end # LPC TPM
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end # LPC 0x439d
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device pci 14.7 off end # SD
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device pci 16.0 on end # USB EHCI2 usb[8:7] - muxed with XHCI
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end #chip southbridge/amd/pi/hudson
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device pci 18.0 on end
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device pci 18.1 on end
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device pci 18.2 on end
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device pci 18.3 on end
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device pci 18.4 on end
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device pci 18.5 on end
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end #domain
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end #northbridge/amd/pi/00730F01/root_complex
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end
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device ref ehci_2 on end # USB EHCI2 usb[8:7] - muxed with XHCI
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end
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end
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end
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@ -6,6 +6,10 @@ config NORTHBRIDGE_AMD_PI_00730F01
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if NORTHBRIDGE_AMD_PI_00730F01
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config CHIPSET_DEVICETREE
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string
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default "northbridge/amd/pi/00730F01/chipset.cb"
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config HW_MEM_HOLE_SIZEK
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hex
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default 0x100000
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@ -0,0 +1,40 @@
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# SPDX-License-Identifier: GPL-2.0-only
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chip northbridge/amd/pi/00730F01/root_complex
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device cpu_cluster 0 on end
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device domain 0 on
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chip northbridge/amd/pi/00730F01
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device pci 0.0 alias gnb on end
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device pci 0.2 alias iommu off end
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device pci 1.0 alias gfx off end
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device pci 1.1 alias gfx_hda off end
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device pci 2.0 on end # Dummy Host Bridge, do not disable
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device pci 2.1 alias gpp_bridge_0 off end
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device pci 2.2 alias gpp_bridge_1 off end
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device pci 2.3 alias gpp_bridge_2 off end
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device pci 2.4 alias gpp_bridge_3 off end
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device pci 2.5 alias gpp_bridge_4 off end
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device pci 8.0 alias psp on end
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end
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chip southbridge/amd/pi/hudson
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device pci 10.0 alias xhci off end
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device pci 11.0 alias sata off end
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device pci 12.0 alias ehci_0 off end
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device pci 13.0 alias ehci_1 off end
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device pci 14.0 alias smbus on end
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device pci 14.2 alias hda off end
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device pci 14.3 alias lpc_bridge on end
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device pci 14.7 alias sdhci off end
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device pci 16.0 alias ehci_2 off end
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end
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device pci 18.0 alias ht_0 on end
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device pci 18.1 alias ht_1 on end
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device pci 18.2 alias ht_2 on end
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device pci 18.3 alias ht_3 on end
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device pci 18.4 alias ht_4 on end
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device pci 18.5 alias ht_5 on end
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end
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end
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