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mainboard/google/kahlee: Disable Bayhub part on board_id 0 

The Bayhub part is not used on proto with board_id 0, so disable it.

BUG=b:74248569
TEST=Build & boot Grunt.  Bayhub part is disabled.

Change-Id: I635356d41bab637726594d403d66dde730f12256
Signed-off-by: Martin Roth <martinroth@chromium.org>
Reviewed-on: https://review.coreboot.org/25015
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Justin TerAvest <teravest@chromium.org>
This commit is contained in:
Martin Roth 2018-03-06 14:39:31 -07:00 committed by Patrick Georgi
parent 7d1593aeb0
commit 001848c415
1 changed files with 99 additions and 0 deletions
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99
src/mainboard/google/kahlee/variants/baseboard/OemCustomize.c
View File

@ -15,6 +15,7 @@
#include <amdblocks/agesawrapper.h>
#include <variant/gpio.h>
#include <boardid.h>
static const PCIe_PORT_DESCRIPTOR PortList[] = {
/* Initialize Port descriptor (PCIe port, Lanes 7:4, D2F1) for NC*/
@ -127,6 +128,98 @@ static const PCIe_COMPLEX_DESCRIPTOR PcieComplex = {
.DdiLinkList = (void *)DdiList
};
/*
* TODO: Remove after we're done with Grunt Proto
*/
static const PCIe_PORT_DESCRIPTOR PortListNoBayhub[] = {
/* Initialize Port descriptor (PCIe port, Lanes 7:4, D2F1) for NC*/
{
0,
PCIE_ENGINE_DATA_INITIALIZER(PcieUnusedEngine, 4, 7),
PCIE_PORT_DATA_INITIALIZER_V2(
PortDisabled, /* mPortPresent */
ChannelTypeExt6db, /* mChannelType */
2, /* mDevAddress */
1, /* mDevFunction */
HotplugDisabled, /* mHotplug */
PcieGenMaxSupported, /* mMaxLinkSpeed */
PcieGenMaxSupported, /* mMaxLinkCap */
AspmL0sL1, /* mAspm */
0, /* mResetId */
0) /* mClkPmSupport */
},
/* Initialize Port descriptor (PCIe port, Lanes 0:0, D2F2) for WLAN */
{
0,
PCIE_ENGINE_DATA_INITIALIZER(PciePortEngine, 0, 0),
PCIE_PORT_DATA_INITIALIZER_V2(
PortEnabled, /* mPortPresent */
ChannelTypeExt6db, /* mChannelType */
2, /* mDevAddress */
2, /* mDevFunction */
HotplugDisabled, /* mHotplug */
PcieGenMaxSupported, /* mMaxLinkSpeed */
PcieGenMaxSupported, /* mMaxLinkCap */
AspmL0sL1, /* mAspm */
PCIE_0_RST, /* mResetId */
0) /* mClkPmSupport */
},
/* Init Port descriptor (PCIe port, Lanes 1:1, D2F3) NC */
{
0,
PCIE_ENGINE_DATA_INITIALIZER(PcieUnusedEngine, 1, 1),
PCIE_PORT_DATA_INITIALIZER_V2(
PortDisabled, /* mPortPresent */
ChannelTypeExt6db, /* mChannelType */
2, /* mDevAddress */
3, /* mDevFunction */
HotplugDisabled, /* mHotplug */
PcieGenMaxSupported, /* mMaxLinkSpeed */
PcieGenMaxSupported, /* mMaxLinkCap */
AspmL0sL1, /* mAspm */
PCIE_1_RST, /* mResetId */
0) /* mClkPmSupport */
},
/* Initialize Port descriptor (PCIe port, Lane 2, D2F4) for EMMC */
{
0,
PCIE_ENGINE_DATA_INITIALIZER(PcieUnusedEngine, 2, 2),
PCIE_PORT_DATA_INITIALIZER_V2(
PortDisabled, /* mPortPresent */
ChannelTypeExt6db, /* mChannelType */
2, /* mDevAddress */
4, /* mDevFunction */
HotplugDisabled, /* mHotplug */
PcieGenMaxSupported, /* mMaxLinkSpeed */
PcieGenMaxSupported, /* mMaxLinkCap */
AspmL0sL1, /* mAspm */
PCIE_2_RST, /* mResetId */
0) /* mClkPmSupport */
},
/* Initialize Port descriptor (PCIe port, Lane3, D2F5) for NC */
{
DESCRIPTOR_TERMINATE_LIST,
PCIE_ENGINE_DATA_INITIALIZER(PcieUnusedEngine, 3, 3),
PCIE_PORT_DATA_INITIALIZER_V2(
PortDisabled, /* mPortPresent */
ChannelTypeExt6db, /* mChannelType */
2, /* mDevAddress */
5, /* mDevFunction */
HotplugDisabled, /* mHotplug */
PcieGenMaxSupported, /* mMaxLinkSpeed */
PcieGenMaxSupported, /* mMaxLinkCap */
AspmL0sL1, /* mAspm */
PCIE_3_RST, /* mResetId */
0) /* mClkPmSupport */
},
};
static const PCIe_COMPLEX_DESCRIPTOR PcieNoBayhub = {
.Flags = DESCRIPTOR_TERMINATE_LIST,
.SocketId = 0,
.PciePortList = (void *)PortListNoBayhub,
.DdiLinkList = (void *)DdiList
};
/*---------------------------------------------------------------------------*/
/**
* OemCustomizeInitEarly
@ -148,4 +241,10 @@ VOID __attribute__((weak)) OemCustomizeInitEarly(IN OUT AMD_EARLY_PARAMS *InitEa
InitEarly->GnbConfig.PcieComplexList = (void *)&PcieComplex;
InitEarly->PlatformConfig.GnbAzI2sBusSelect = GnbAcpI2sBus;
InitEarly->PlatformConfig.GnbAzI2sBusPinConfig = GnbAcp2Tx4RxBluetooth;
/* Completely disable Bayhub EMMC bridge on Proto with board_id 0 */
/* Todo: Remove when we're done with Proto */
if (board_id() == 0)
InitEarly->GnbConfig.PcieComplexList = (void *)&PcieNoBayhub;
}