northbridge/intel/pineview: Add native raminit

Does native ram init for Intel Atom D5xx 8086:a000 northbridge

Tested on Intel D510MO mainboard, board boots linux kernel

- Works fully with both dimms populated (2x2GB), memtest passes 100%
- Almost boots with only one dimm in one of the slots
  (suspect bad memory map with one dimm?)
- Reads garbage with only one dimm in other slot

Change-Id: Ibd22be2a959045e0a83aae2a3a0e877013f80711
Signed-off-by: Damien Zammit <damien@zamaudio.com>
Reviewed-on: https://review.coreboot.org/12501
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
This commit is contained in:
Damien Zammit 2015-11-20 17:17:51 +11:00 committed by Stefan Reinauer
parent f7060f1d0f
commit 003d15cab4
3 changed files with 2677 additions and 0 deletions

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@ -21,6 +21,7 @@ ramstage-y += northbridge.c
ramstage-y += acpi.c
romstage-y += ram_calc.c
romstage-y += raminit.c
romstage-y += early_init.c
endif

File diff suppressed because it is too large Load Diff

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@ -0,0 +1,22 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2015 Damien Zammit <damien@zamaudio.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef PINEVIEW_RAMINIT_H
#define PINEVIEW_RAMINIT_H
void sdram_initialize(int boot_path, const u8 *sdram_addresses);
#endif /* PINEVIEW_RAMINIT_H */