From 008c127074345910de4b7726ccd0cca2d8a89854 Mon Sep 17 00:00:00 2001 From: Greg Watson Date: Mon, 28 Jul 2003 21:16:21 +0000 Subject: [PATCH] added ppc_ to function names git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1050 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/arch/ppc/lib/cpuid.c | 4 +- src/arch/ppc/lib/floats.S | 4 +- src/arch/ppc/lib/setup.c | 141 +++++++++++++++++++------------------- 3 files changed, 75 insertions(+), 74 deletions(-) diff --git a/src/arch/ppc/lib/cpuid.c b/src/arch/ppc/lib/cpuid.c index c80458d09c..c874a9b7fc 100644 --- a/src/arch/ppc/lib/cpuid.c +++ b/src/arch/ppc/lib/cpuid.c @@ -7,8 +7,8 @@ void display_cpuid(void) { - unsigned type = __getpvr() >> 16; - unsigned version = __getpvr() & 0xffff; + unsigned type = ppc_getpvr() >> 16; + unsigned version = ppc_getpvr() & 0xffff; const char *cpu_string = 0; switch(type) { case 1: diff --git a/src/arch/ppc/lib/floats.S b/src/arch/ppc/lib/floats.S index 393ebe338c..8b8eb495f0 100644 --- a/src/arch/ppc/lib/floats.S +++ b/src/arch/ppc/lib/floats.S @@ -3,9 +3,9 @@ #include - .globl _init_float_registers + .globl ppc_init_float_registers -_init_float_registers: +ppc_init_float_registers: lfd fr0, 0(r3) lfd fr1, 0(r3) lfd fr2, 0(r3) diff --git a/src/arch/ppc/lib/setup.c b/src/arch/ppc/lib/setup.c index 09fd4c06e2..3e197b37df 100644 --- a/src/arch/ppc/lib/setup.c +++ b/src/arch/ppc/lib/setup.c @@ -4,50 +4,50 @@ #include "ppc.h" #include "ppcreg.h" -unsigned __getmsr(void) +unsigned ppc_getmsr(void) { - unsigned result; - __asm__ volatile ("mfmsr %0" : "=r" (result)); - return result; + unsigned result; + __asm__ volatile ("mfmsr %0" : "=r" (result)); + return result; } -unsigned __gethid0(void) +unsigned ppc_gethid0(void) { - unsigned result; - __asm__ volatile ("mfspr %0,1008" : "=r" (result)); - return result; + unsigned result; + __asm__ volatile ("mfspr %0,1008" : "=r" (result)); + return result; } -unsigned __gethid1(void) +unsigned ppc_gethid1(void) { - unsigned result; - __asm__ volatile ("mfspr %0,1009" : "=r" (result)); - return result; + unsigned result; + __asm__ volatile ("mfspr %0,1009" : "=r" (result)); + return result; } -void __sethid0(unsigned value) +void ppc_sethid0(unsigned value) { - __asm__ volatile ("mtspr 1008,%0" : : "r" (value)); + __asm__ volatile ("mtspr 1008,%0" : : "r" (value)); } -unsigned __getpvr(void) +unsigned ppc_getpvr(void) { - int result; - __asm__("mfspr %0, 287" : "=r" (result)); - return result; + unsigned result; + __asm__("mfspr %0, 287" : "=r" (result)); + return result; } -void __setmsr(unsigned value) +void ppc_setmsr(unsigned value) { - __asm__ volatile ("mtmsr %0; sync" :: "r" (value)); + __asm__ volatile ("mtmsr %0; sync" :: "r" (value)); } -void __set1015(unsigned value) +void ppc_set1015(unsigned value) { - __asm__ volatile ("mtspr 1015,%0" : : "r" (value)); + __asm__ volatile ("mtspr 1015,%0" : : "r" (value)); } -extern void _init_float_registers(const double *); +extern void ppc_init_float_registers(const double *); /*RODATA static const double dummy_float = 1.0;*/ static const double dummy_float = 1.0; @@ -56,34 +56,35 @@ static const double dummy_float = 1.0; void ppc_setup_cpu(int icache) { - int type = __getpvr() >> 16; - int version = __getpvr() & 0xffff; - - if (type == 0xc) - { - if (version == 0x0200) - __set1015(0x19000004); - else if (((version & 0xff00) == 0x0200) && - (version != 0x0209)) - __set1015(0x01000000); - } - if (icache) - { - __sethid0(HID0_NHR | HID0_BHT | HID0_ICE | HID0_ICFI | HID0_BTIC - | HID0_DCACHE); - __sethid0(HID0_DPM | HID0_NHR | HID0_BHT | HID0_ICE | HID0_BTIC - | HID0_DCACHE); - } - else - { - __sethid0(HID0_DPM | HID0_NHR | HID0_BHT | HID0_BTIC | HID0_DCACHE); - } + int type = ppc_getpvr() >> 16; + int version = ppc_getpvr() & 0xffff; + + if (type == 0xc) + { + if (version == 0x0200) + ppc_set1015(0x19000004); + else if (((version & 0xff00) == 0x0200) && + (version != 0x0209)) + ppc_set1015(0x01000000); + } + if (icache) + { + ppc_sethid0(HID0_NHR | HID0_BHT | HID0_ICE | HID0_ICFI + | HID0_BTIC | HID0_DCACHE); + ppc_sethid0(HID0_DPM | HID0_NHR | HID0_BHT | HID0_ICE + | HID0_BTIC | HID0_DCACHE); + } + else + { + ppc_sethid0(HID0_DPM | HID0_NHR | HID0_BHT | HID0_BTIC + | HID0_DCACHE); + } #if 1 - /* if (type == 8 || type == 12) */ - { - __setmsr(MSR_FP | MSR_DATA); - _init_float_registers(&dummy_float); - } + /* if (type == 8 || type == 12) */ + { + ppc_setmsr(MSR_FP | MSR_DATA); + ppc_init_float_registers(&dummy_float); + } #endif } @@ -93,37 +94,37 @@ void ppc_enable_dcache(void) * Already enabled in crt0.S */ #if 0 - unsigned hid0 = __gethid0(); - __sethid0(hid0 | HID0_DCFI | HID0_DCE); - __sethid0(hid0 | HID0_DCE); + unsigned hid0 = ppc_gethid0(); + ppc_sethid0(hid0 | HID0_DCFI | HID0_DCE); + ppc_sethid0(hid0 | HID0_DCE); #endif } void ppc_disable_dcache(void) { - unsigned hid0 = __gethid0(); - __sethid0(hid0 & ~HID0_DCE); + unsigned hid0 = ppc_gethid0(); + ppc_sethid0(hid0 & ~HID0_DCE); } void ppc_enable_mmu(void) { - unsigned msr = __getmsr(); - __setmsr(msr | MSR_DR | MSR_IR); + unsigned msr = ppc_getmsr(); + ppc_setmsr(msr | MSR_DR | MSR_IR); } void make_coherent(void *base, unsigned length) { - unsigned hid0 = __gethid0(); - - if (hid0 & HID0_DCE) - { - unsigned i; - unsigned offset = 0x1f & (unsigned) base; - unsigned adjusted_base = (unsigned) base & ~0x1f; - for(i = 0; i < length + offset; i+= 32) - __asm__ volatile ("dcbf %1,%0" : : "r" (adjusted_base), "r" (i)); - if (hid0 & HID0_ICE) - for(i = 0; i < length + offset; i+= 32) - __asm__ volatile ("icbi %1,%0" : : "r" (adjusted_base), "r" (i)); - } + unsigned hid0 = ppc_gethid0(); + + if (hid0 & HID0_DCE) + { + unsigned i; + unsigned offset = 0x1f & (unsigned) base; + unsigned adjusted_base = (unsigned) base & ~0x1f; + for(i = 0; i < length + offset; i+= 32) + __asm__ volatile ("dcbf %1,%0" : : "r" (adjusted_base), "r" (i)); + if (hid0 & HID0_ICE) + for(i = 0; i < length + offset; i+= 32) + __asm__ volatile ("icbi %1,%0" : : "r" (adjusted_base), "r" (i)); + } }