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AMD Fam14 DSDT: Add OSC method 

The _OSC method is used to tell the OS what capabilities
it can take control over from the firmware.  This method
is described in chapter 6.2.9 of the ACPI spec v3.0.
The method takes 4 inputs (UUID, Rev ID, Input Count,
and Capabilities Buffer) and returns a Capabilites
Buffer the same size as the input Buffer.  This Buffer
is generally 3 Dwords long consisting of an Errors
Dword, a Supported Capabilities Dword, and a Control
Dword.  The OS will request control of certain
capabilities and the firmware must grant or deny control
of those features.  We do not want to have control over
anything so let the OS control as much as it can.

The _OSC method is required for PCIe devices and dmesg
checks for its existence and issues an error if it is
not found.

This is the same change made to Persimmon with Change-ID
I149428:
http://review.coreboot.org/#/c/2684/

Change-Id: If6dd1a558d9c319d9a41ce63588550c8e81e595f
Signed-off-by: Mike Loptien <mike.loptien@se-eng.com>
Reviewed-on: http://review.coreboot.org/2738
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Mike Loptien 2013-03-15 13:17:52 -06:00 committed by Stefan Reinauer
parent 9c3d112bb6
commit 00a0e76bc5
3 changed files with 39 additions and 3 deletions
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14
src/mainboard/amd/inagua/dsdt.asl
View File

@ -1157,8 +1157,20 @@ DefinitionBlock (
Device(PCI0) { Device(PCI0) {
External (TOM1) External (TOM1)
External (TOM2) External (TOM2)
Name(_HID, EISAID("PNP0A03")) Name(_HID, EISAID("PNP0A08")) /* PCI Express Root Bridge */
Name(_CID, EISAID("PNP0A03")) /* PCI Root Bridge */
Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */ Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */
/* Operating System Capabilities Method */
Method(_OSC,4)
{ /* Check for proper PCI/PCIe UUID */
If(LEqual(Arg0,ToUUID("33DB4D5B-1FF7-401C-9657-7441C03DD766")))
{
/* Let OS control everything */
Return (Arg3)
}
}
Method(_BBN, 0) { /* Bus number = 0 */ Method(_BBN, 0) { /* Bus number = 0 */
Return(0) Return(0)
} }

14
src/mainboard/amd/south_station/dsdt.asl
View File

@ -1157,8 +1157,20 @@ DefinitionBlock (
Device(PCI0) { Device(PCI0) {
External (TOM1) External (TOM1)
External (TOM2) External (TOM2)
Name(_HID, EISAID("PNP0A03")) Name(_HID, EISAID("PNP0A08")) /* PCI Express Root Bridge */
Name(_CID, EISAID("PNP0A03")) /* PCI Root Bridge */
Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */ Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */
/* Operating System Capabilities Method */
Method(_OSC,4)
{ /* Check for proper PCI/PCIe UUID */
If(LEqual(Arg0,ToUUID("33DB4D5B-1FF7-401C-9657-7441C03DD766")))
{
/* Let OS control everything */
Return (Arg3)
}
}
Method(_BBN, 0) { /* Bus number = 0 */ Method(_BBN, 0) { /* Bus number = 0 */
Return(0) Return(0)
} }

14
src/mainboard/amd/union_station/dsdt.asl
View File

@ -1157,8 +1157,20 @@ DefinitionBlock (
Device(PCI0) { Device(PCI0) {
External (TOM1) External (TOM1)
External (TOM2) External (TOM2)
Name(_HID, EISAID("PNP0A03")) Name(_HID, EISAID("PNP0A08")) /* PCI Express Root Bridge */
Name(_CID, EISAID("PNP0A03")) /* PCI Root Bridge */
Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */ Name(_ADR, 0x00180000) /* Dev# = BSP Dev#, Func# = 0 */
/* Operating System Capabilities Method */
Method(_OSC,4)
{ /* Check for proper PCI/PCIe UUID */
If(LEqual(Arg0,ToUUID("33DB4D5B-1FF7-401C-9657-7441C03DD766")))
{
/* Let OS control everything */
Return (Arg3)
}
}
Method(_BBN, 0) { /* Bus number = 0 */ Method(_BBN, 0) { /* Bus number = 0 */
Return(0) Return(0)
} }