From 00b43c98437484c59da0d1332936ee9a15d453fe Mon Sep 17 00:00:00 2001 From: Rex-BC Chen Date: Mon, 10 May 2021 20:06:35 +0800 Subject: [PATCH] soc/mediatek/mt8195: configure DMA buffer in DRAM Set DRAM DMA to be non-cacheable to load blob correctly. Signed-off-by: Rex-BC Chen Change-Id: I819d40431fc7c9e7549686736d9e70de1c1982f0 Reviewed-on: https://review.coreboot.org/c/coreboot/+/54052 Reviewed-by: Hung-Te Lin Reviewed-by: Yu-Ping Wu Tested-by: build bot (Jenkins) --- src/soc/mediatek/mt8195/Makefile.inc | 1 + src/soc/mediatek/mt8195/mmu_operations.c | 7 +++++++ 2 files changed, 8 insertions(+) diff --git a/src/soc/mediatek/mt8195/Makefile.inc b/src/soc/mediatek/mt8195/Makefile.inc index 67ceed3603..a04ccf4a19 100644 --- a/src/soc/mediatek/mt8195/Makefile.inc +++ b/src/soc/mediatek/mt8195/Makefile.inc @@ -26,6 +26,7 @@ romstage-y += emi.c romstage-y += ../common/flash_controller.c romstage-y += ../common/gpio.c gpio.c romstage-y += ../common/i2c.c i2c.c +romstage-y += ../common/mmu_operations.c mmu_operations.c romstage-y += ../common/pll.c pll.c romstage-y += scp.c romstage-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c diff --git a/src/soc/mediatek/mt8195/mmu_operations.c b/src/soc/mediatek/mt8195/mmu_operations.c index 7018093dd9..de6e8bcdf9 100644 --- a/src/soc/mediatek/mt8195/mmu_operations.c +++ b/src/soc/mediatek/mt8195/mmu_operations.c @@ -29,3 +29,10 @@ void mtk_soc_disable_l2c_sram(void) MP0_CLUSTER_CFG0_L3_SHARE_PRE_EN, 0); dsb(); } + +/* mtk_soc_after_dram is called in romstage */ +void mtk_soc_after_dram(void) +{ + mmu_config_range(_dram_dma, REGION_SIZE(dram_dma), + NONSECURE_UNCACHED_MEM); +}