soc/intel/meteorlake: Add CPU PortID for GPIO Community
Add CPU PortID for GPIO communities in order to calculate IOM Aux Bias data correctly. BUG=b:283044004 TEST=able to detect external display Signed-off-by: Marx Wang <marx.wang@intel.com> Change-Id: I79f27fb0b6bde0a4ce2466eaf707166a952fad81 Reviewed-on: https://review.coreboot.org/c/coreboot/+/75390 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Subrata Banik <subratabanik@google.com> Reviewed-by: Kapil Porwal <kapilporwal@google.com> Reviewed-by: Tarun Tuli <taruntuli@google.com>
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@ -75,6 +75,7 @@ static const struct vw_entries mtl_community5_vw[] = {
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static const struct pad_community mtl_communities[] = {
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[COMM_0] = { /* GPP CPU, V, C */
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.port = PID_GPIOCOM0,
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.cpu_port = PID_GPIOCOM0,
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.first_pad = GPIO_COM0_START,
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.last_pad = GPIO_COM0_END,
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.num_gpi_regs = NUM_GPIO_COM0_GPI_REGS,
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@ -102,6 +103,7 @@ static const struct pad_community mtl_communities[] = {
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},
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[COMM_1] = { /* GPP A, E */
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.port = PID_GPIOCOM1,
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.cpu_port = PID_GPIOCOM1,
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.first_pad = GPIO_COM1_START,
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.last_pad = GPIO_COM1_END,
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.num_gpi_regs = NUM_GPIO_COM1_GPI_REGS,
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@ -129,6 +131,7 @@ static const struct pad_community mtl_communities[] = {
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},
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[COMM_3] = { /* GPP H, F, SPI0, VGPIO3 */
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.port = PID_GPIOCOM3,
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.cpu_port = PID_GPIOCOM3,
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.first_pad = GPIO_COM3_START,
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.last_pad = GPIO_COM3_END,
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.num_gpi_regs = NUM_GPIO_COM3_GPI_REGS,
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@ -152,6 +155,7 @@ static const struct pad_community mtl_communities[] = {
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},
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[COMM_4] = { /* GPP S, JTAG */
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.port = PID_GPIOCOM4,
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.cpu_port = PID_GPIOCOM4,
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.first_pad = GPIO_COM4_START,
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.last_pad = GPIO_COM4_END,
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.num_gpi_regs = NUM_GPIO_COM4_GPI_REGS,
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@ -172,6 +176,7 @@ static const struct pad_community mtl_communities[] = {
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},
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[COMM_5] = { /* GPP B, D, VGPIO */
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.port = PID_GPIOCOM5,
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.cpu_port = PID_GPIOCOM5,
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.first_pad = GPIO_COM5_START,
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.last_pad = GPIO_COM5_END,
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.num_gpi_regs = NUM_GPIO_COM5_GPI_REGS,
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