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mb/prodrive/hermes: Correct memory RCOMP settings 

The original RCOMP resistor and target values only apply to ULT CPUs and
do not make sense for the CFL-S CPUs Hermes uses. Fix the RCOMP settings
and the associated comments.

Tested, still boots.

Change-Id: I015797c58c914c6581d472e6d70d2dd7bad2b14f
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58364
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
This commit is contained in:
Angel Pons 2021-12-02 11:31:06 +01:00 committed by Felix Held
parent 84b9191831
commit 012dc590b3
1 changed files with 4 additions and 4 deletions
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8
src/mainboard/prodrive/hermes/romstage.c
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@ -24,11 +24,11 @@ static const struct cnl_mb_cfg baseboard_mem_cfg = {
.spd_spec = {.spd_smbus_address = 0xa6} .spd_spec = {.spd_smbus_address = 0xa6}
}, },
/* Baseboard uses 121, 81 and 100 rcomp resistors */ /* Rcomp resistors on CFL-S are located on the CPU itself */
.rcomp_resistor = {121, 81, 100}, .rcomp_resistor = {121, 75, 100},
/* Baseboard Rcomp target values. */ /* Rcomp target values for CFL-S, DDR4 and 2 DIMMs per channel */
.rcomp_targets = {100, 40, 20, 20, 26}, .rcomp_targets = {60, 26, 20, 20, 26},
/* Baseboard is an interleaved design */ /* Baseboard is an interleaved design */
.dq_pins_interleaved = 1, .dq_pins_interleaved = 1,