diff --git a/src/soc/rockchip/common/gpio.c b/src/soc/rockchip/common/gpio.c new file mode 100644 index 0000000000..6f30229817 --- /dev/null +++ b/src/soc/rockchip/common/gpio.c @@ -0,0 +1,66 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2014 Rockchip Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include +#include + +enum { + PULLNONE = 0, + PULLUP, + PULLDOWN +}; + +static void __gpio_input(gpio_t gpio, u32 pull) +{ + clrbits_le32(&gpio_port[gpio.port]->swporta_ddr, 1 << gpio.num); + if (is_pmu_gpio(gpio)) + clrsetbits_le32(gpio_grf_reg(gpio), 3 << (gpio.idx * 2), + pull << (gpio.idx * 2)); + else + write32(gpio_grf_reg(gpio), RK_CLRSETBITS(3 << (gpio.idx * 2), + pull << (gpio.idx * 2))); +} + +void gpio_input(gpio_t gpio) +{ + __gpio_input(gpio, PULLNONE); +} + +void gpio_input_pulldown(gpio_t gpio) +{ + __gpio_input(gpio, PULLDOWN); +} + +void gpio_input_pullup(gpio_t gpio) +{ + __gpio_input(gpio, PULLUP); +} + +int gpio_get(gpio_t gpio) +{ + return (read32(&gpio_port[gpio.port]->ext_porta) >> gpio.num) & 0x1; +} + +void gpio_output(gpio_t gpio, int value) +{ + setbits_le32(&gpio_port[gpio.port]->swporta_ddr, 1 << gpio.num); + clrsetbits_le32(&gpio_port[gpio.port]->swporta_dr, 1 << gpio.num, + !!value << gpio.num); +} diff --git a/src/soc/rockchip/rk3288/include/soc/gpio.h b/src/soc/rockchip/common/include/soc/gpio.h similarity index 66% rename from src/soc/rockchip/rk3288/include/soc/gpio.h rename to src/soc/rockchip/common/include/soc/gpio.h index 05b30b9627..f2e7970daa 100644 --- a/src/soc/rockchip/rk3288/include/soc/gpio.h +++ b/src/soc/rockchip/common/include/soc/gpio.h @@ -1,7 +1,7 @@ /* * This file is part of the coreboot project. * - * Copyright 2014 Rockchip Inc. + * Copyright 2016 Rockchip Inc. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -13,14 +13,14 @@ * GNU General Public License for more details. */ -#ifndef __SOC_ROCKCHIP_RK3288_GPIO_H__ -#define __SOC_ROCKCHIP_RK3288_GPIO_H__ +#ifndef __COREBOOT_SRC_SOC_ROCKCHIP_COMMON_INCLUDE_SOC_GPIO_H +#define __COREBOOT_SRC_SOC_ROCKCHIP_COMMON_INCLUDE_SOC_GPIO_H #include #define GPIO(p, b, i) ((gpio_t){.port = p, .bank = GPIO_##b, .idx = i}) -struct rk3288_gpio_regs { +struct rockchip_gpio_regs { u32 swporta_dr; u32 swporta_ddr; u32 reserved0[(0x30 - 0x08) / 4]; @@ -36,7 +36,7 @@ struct rk3288_gpio_regs { u32 reserved1[(0x60 - 0x54) / 4]; u32 ls_sync; }; -check_member(rk3288_gpio_regs, ls_sync, 0x60); +check_member(rockchip_gpio_regs, ls_sync, 0x60); typedef union { u32 raw; @@ -44,13 +44,13 @@ typedef union { u16 port; union { struct { - u16 num:5; - u16 :11; + u16 num : 5; + u16 reserved1 : 11; }; struct { - u16 idx:3; - u16 bank:2; - u16 :11; + u16 idx : 3; + u16 bank : 2; + u16 reserved2 : 11; }; }; }; @@ -63,4 +63,11 @@ enum { GPIO_D, }; -#endif /* __SOC_ROCKCHIP_RK3288_GPIO_H__ */ +extern struct rockchip_gpio_regs *gpio_port[]; + +/* Check if the gpio port is a pmu gpio */ +int is_pmu_gpio(gpio_t gpio); + +/* Return the io addr of gpio register */ +void *gpio_grf_reg(gpio_t gpio); +#endif diff --git a/src/soc/rockchip/rk3288/Makefile.inc b/src/soc/rockchip/rk3288/Makefile.inc index 553bd00ba5..1eab8f2c52 100644 --- a/src/soc/rockchip/rk3288/Makefile.inc +++ b/src/soc/rockchip/rk3288/Makefile.inc @@ -25,6 +25,7 @@ endif bootblock-y += timer.c bootblock-y += clock.c bootblock-y += ../common/spi.c +bootblock-y += ../common/gpio.c bootblock-y += gpio.c bootblock-y += ../common/i2c.c bootblock-$(CONFIG_SOFTWARE_I2C) += software_i2c.c @@ -33,6 +34,7 @@ bootblock-y += ../common/rk808.c verstage-y += ../common/spi.c verstage-y += timer.c verstage-$(CONFIG_DRIVERS_UART) += ../common/uart.c +verstage-y += ../common/gpio.c verstage-y += gpio.c verstage-y += clock.c libverstage-y += crypto.c @@ -45,6 +47,7 @@ romstage-$(CONFIG_DRIVERS_UART) += ../common/uart.c romstage-y += ../common/i2c.c romstage-$(CONFIG_SOFTWARE_I2C) += software_i2c.c romstage-y += clock.c +romstage-y += ../common/gpio.c romstage-y += gpio.c romstage-y += ../common/spi.c romstage-y += sdram.c @@ -60,6 +63,7 @@ ramstage-$(CONFIG_SOFTWARE_I2C) += software_i2c.c ramstage-y += clock.c ramstage-y += ../common/spi.c ramstage-y += sdram.c +ramstage-y += ../common/gpio.c ramstage-y += gpio.c ramstage-y += ../common/rk808.c ramstage-y += ../common/pwm.c diff --git a/src/soc/rockchip/rk3288/gpio.c b/src/soc/rockchip/rk3288/gpio.c index 35b4b7ee88..8a15b85908 100644 --- a/src/soc/rockchip/rk3288/gpio.c +++ b/src/soc/rockchip/rk3288/gpio.c @@ -16,66 +16,37 @@ #include #include #include +#include #include #include #include #include -struct rk3288_gpio_regs *gpio_port[] = { - (struct rk3288_gpio_regs *)0xff750000, - (struct rk3288_gpio_regs *)0xff780000, - (struct rk3288_gpio_regs *)0xff790000, - (struct rk3288_gpio_regs *)0xff7a0000, - (struct rk3288_gpio_regs *)0xff7b0000, - (struct rk3288_gpio_regs *)0xff7c0000, - (struct rk3288_gpio_regs *)0xff7d0000, - (struct rk3288_gpio_regs *)0xff7e0000, - (struct rk3288_gpio_regs *)0xff7f0000 -}; - -enum { - PULLNONE = 0, - PULLUP, - PULLDOWN +struct rockchip_gpio_regs *gpio_port[] = { + (struct rockchip_gpio_regs *)0xff750000, + (struct rockchip_gpio_regs *)0xff780000, + (struct rockchip_gpio_regs *)0xff790000, + (struct rockchip_gpio_regs *)0xff7a0000, + (struct rockchip_gpio_regs *)0xff7b0000, + (struct rockchip_gpio_regs *)0xff7c0000, + (struct rockchip_gpio_regs *)0xff7d0000, + (struct rockchip_gpio_regs *)0xff7e0000, + (struct rockchip_gpio_regs *)0xff7f0000 }; #define PMU_GPIO_PORT 0 -static void __gpio_input(gpio_t gpio, u32 pull) +int is_pmu_gpio(gpio_t gpio) { - clrbits_le32(&gpio_port[gpio.port]->swporta_ddr, 1 << gpio.num); if (gpio.port == PMU_GPIO_PORT) - clrsetbits_le32(&rk3288_pmu->gpio0pull[gpio.bank], - 3 << (gpio.idx * 2), pull << (gpio.idx * 2)); - else - write32(&rk3288_grf->gpio1_p[(gpio.port - 1)][gpio.bank], - RK_CLRSETBITS(3 << (gpio.idx * 2), - pull << (gpio.idx * 2))); + return 1; + return 0; } -void gpio_input(gpio_t gpio) +void *gpio_grf_reg(gpio_t gpio) { - __gpio_input(gpio, PULLNONE); -} - -void gpio_input_pulldown(gpio_t gpio) -{ - __gpio_input(gpio, PULLDOWN); -} - -void gpio_input_pullup(gpio_t gpio) -{ - __gpio_input(gpio, PULLUP); -} - -int gpio_get(gpio_t gpio) -{ - return (read32(&gpio_port[gpio.port]->ext_porta) >> gpio.num) & 0x1; -} - -void gpio_output(gpio_t gpio, int value) -{ - setbits_le32(&gpio_port[gpio.port]->swporta_ddr, 1 << gpio.num); - clrsetbits_le32(&gpio_port[gpio.port]->swporta_dr, 1 << gpio.num, - !!value << gpio.num); + if (is_pmu_gpio(gpio)) + return &rk3288_pmu->gpio0pull[gpio.bank]; + /* There is one pmu gpio, gpio0 , so " - 1" */ + return &rk3288_grf->gpio1_p[(gpio.port - 1)][gpio.bank]; }