soc/intel/common/cse: Show CSE device slot and function number properly

This patch fixes a problem where the `is_cse_devfn_visible` function is
unable to show the CSE device slot and function number properly. 

BUG=b:211954778
TEST=Able to display CSE device slot and function number properly as
below:

Before:
[DEBUG]  PCI: 00:16.0 final
[WARN ]  HECI: CSE device 00.0 is disabled
[WARN ]  HECI: CSE device 00.0 is disabled
[WARN ]  HECI: CSE device 00.0 is disabled
[WARN ]  HECI: CSE device 00.0 is disabled
[WARN ]  HECI: CSE device 00.0 is disabled

With this code changes:
[DEBUG]  PCI: 00:16.0 final
[WARN ]  HECI: CSE device 16.1 is disabled
[WARN ]  HECI: CSE device 16.2 is disabled
[WARN ]  HECI: CSE device 16.3 is disabled
[WARN ]  HECI: CSE device 16.4 is disabled
[WARN ]  HECI: CSE device 16.5 is disabled

Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: I76a634c64af26fc0ac24e2c0bb3a8f397a65d77b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63406
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
This commit is contained in:
Subrata Banik 2022-04-06 18:59:37 +05:30 committed by Felix Held
parent 96527da2da
commit 01bf0020d2
1 changed files with 3 additions and 3 deletions

View File

@ -1012,11 +1012,11 @@ void cse_set_to_d0i3(void)
void heci_set_to_d0i3(void) void heci_set_to_d0i3(void)
{ {
for (int i = 0; i < CONFIG_MAX_HECI_DEVICES; i++) { for (int i = 0; i < CONFIG_MAX_HECI_DEVICES; i++) {
pci_devfn_t dev = PCI_DEV(0, PCI_SLOT(PCH_DEV_SLOT_CSE), PCI_FUNC(i)); pci_devfn_t devfn = PCI_DEVFN(PCH_DEV_SLOT_CSE, i);
if (!is_cse_devfn_visible(dev)) if (!is_cse_devfn_visible(devfn))
continue; continue;
set_cse_device_state(dev, DEV_IDLE); set_cse_device_state(devfn, DEV_IDLE);
} }
} }