cubieboard: Enable the SD controller and mux SD pins
This step needs to be done before calling any MMC functionality. Change-Id: I88763072c8a541ddba794e79fb55e82eb2f187a9 Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-on: http://review.coreboot.org/4745 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@gmail.com>
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@ -66,6 +66,16 @@
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/* DRAM_CLK values*/
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/* DRAM_CLK values*/
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#define DRAM_CTRL_DCLK_OUT (1 << 15)
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#define DRAM_CTRL_DCLK_OUT (1 << 15)
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/* SDx_CLK values */
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#define SDx_CLK_GATE (1 << 31)
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#define SDx_CLK_SRC_MASK (3 << 24)
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#define SDx_CLK_SRC_OSC24M (0 << 24)
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#define SDx_CLK_SRC_PLL6 (1 << 24)
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#define SDx_CLK_SRC_PLL5 (2 << 24)
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#define SDx_RAT_EXP_N_MASK (3 << 16)
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#define SDx_RAT_EXP_N(n) (((n) << 16) & SDx_RAT_EXP_N_MASK)
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#define SDx_RAT_M_MASK (0xf << 0)
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#define SDx_RAT_M(m) ((((m) - 1) << 0) & SDx_RAT_M_MASK)
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/**
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/**
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* \brief Clock gating definitions
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* \brief Clock gating definitions
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*
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*
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@ -27,6 +27,10 @@
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#define GPB_UART0_FUNC 2
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#define GPB_UART0_FUNC 2
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#define GPB_UART0_PINS ((1 << 22) | (1 << 23))
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#define GPB_UART0_PINS ((1 << 22) | (1 << 23))
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#define GPF_SD0_FUNC 2
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#define GPF_SD0_PINS 0x3f /* PF0 thru PF5 */
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#define GPH1_SD0_DET_FUNC 5
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static void cubieboard_set_sys_clock(void)
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static void cubieboard_set_sys_clock(void)
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{
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{
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u32 reg32;
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u32 reg32;
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@ -60,6 +64,13 @@ static void cubieboard_setup_clocks(void)
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write32(APB1_CLK_SRC_OSC24M | APB1_RAT_N(0) | APB1_RAT_M(0),
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write32(APB1_CLK_SRC_OSC24M | APB1_RAT_N(0) | APB1_RAT_M(0),
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&ccm->apb1_clk_div_cfg);
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&ccm->apb1_clk_div_cfg);
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/* Configure the clock for SD0 */
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write32(SDx_CLK_GATE | SDx_CLK_SRC_OSC24M | SDx_RAT_EXP_N(0)
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| SDx_RAT_M(1), &ccm->sd0_clk_cfg);
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/* Enable clock to SD0 */
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a1x_periph_clock_enable(A1X_CLKEN_MMC0);
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}
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}
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static void cubieboard_setup_gpios(void)
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static void cubieboard_setup_gpios(void)
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@ -71,6 +82,10 @@ static void cubieboard_setup_gpios(void)
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/* Mux UART pins */
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/* Mux UART pins */
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gpio_set_multipin_func(GPB, GPB_UART0_PINS, GPB_UART0_FUNC);
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gpio_set_multipin_func(GPB, GPB_UART0_PINS, GPB_UART0_FUNC);
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/* Mux SD pins */
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gpio_set_multipin_func(GPF, GPF_SD0_PINS, GPF_SD0_FUNC);
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gpio_set_pin_func(GPH, 1, GPH1_SD0_DET_FUNC);
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}
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}
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static void cubieboard_enable_uart(void)
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static void cubieboard_enable_uart(void)
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