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Clear bit 35 of msr c001_102a in Fam10 rev C cores. 

Signed-off-by: Arne Georg Gleditsch <arne.gleditsch@numascale.com>
Acked-by: Scott Duplichan <scott@notabs.org>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5817 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Arne Georg Gleditsch 2010-09-17 00:13:52 +00:00 committed by Marc Jones
parent 8985ef179b
commit 01d56d4276
2 changed files with 4 additions and 2 deletions
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2
src/cpu/amd/model_10xxx/defaults.h
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@ -91,7 +91,7 @@ static const struct {
{ BU_CFG2, AMD_DRBH_Cx , AMD_PTYPE_ALL,
0x00000000, 1 << (35-32),
0x00000000, 1 << (35-32) }, /* Erratum 343 (set to 0 after CAR, in post_cache_as_ram() ) */
0x00000000, 1 << (35-32) }, /* Erratum 343 (set to 0 after CAR, in post_cache_as_ram()/model_10xxx_init() ) */
};

4
src/cpu/amd/model_10xxx/model_10xxx_init.c
View File

@ -113,9 +113,11 @@ static void model_10xxx_init(device_t dev)
msr.hi &= ~(1 << (46 - 32));
wrmsr(NB_CFG_MSR, msr);
/* Clear ClLinesToNbDis */
msr = rdmsr(BU_CFG2_MSR);
/* Clear ClLinesToNbDis */
msr.lo &= ~(1 << 15);
/* Clear bit 35 as per Erratum 343 */
msr.hi &= ~(1 << (35-32));
wrmsr(BU_CFG2_MSR, msr);
/* Write protect SMM space with SMMLOCK. */