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soc/intel/alderlake: Select SOC_INTEL_COMMON_BLOCK_SCS for Alder Lake N 

Alder Lake N has eMMC storage device. Select SOC_INTEL_COMMON_BLOCK_SCS
Kconfig for Alder Lake N.

Change-Id: I577ffdc80ef09471309c827551a347d4397a33d1
Signed-off-by: Krishna Prasad Bhat <krishna.p.bhat.d@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61128
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kangheui Won <khwon@chromium.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
This commit is contained in:
Krishna Prasad Bhat 2022-01-16 22:37:21 +05:30 committed by Subrata Banik
parent e258df2cb7
commit 01e426d217
2 changed files with 3 additions and 0 deletions
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1
src/soc/intel/alderlake/Kconfig
View File

@ -76,6 +76,7 @@ config CPU_SPECIFIC_OPTIONS
select SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT
select SOC_INTEL_COMMON_BLOCK_GPIO_LOCK_USING_SBI
select SOC_INTEL_COMMON_BLOCK_GSPI_VERSION_2
select SOC_INTEL_COMMON_BLOCK_SCS if SOC_INTEL_ALDERLAKE_PCH_N
select SOC_INTEL_COMMON_BLOCK_HDA
select SOC_INTEL_COMMON_BLOCK_IPU
select SOC_INTEL_COMMON_BLOCK_IRQ

2
src/soc/intel/common/block/scs/Makefile.inc
View File

@ -1,3 +1,5 @@
ifneq ($(CONFIG_SOC_INTEL_ALDERLAKE_PCH_N),y)
ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SCS) += sd.c
endif
ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SCS) += mmc.c
romstage-$(CONFIG_SOC_INTEL_COMMON_EARLY_MMC_WAKE) += early_mmc.c