diff --git a/src/mainboard/intel/adlrvp/memory.c b/src/mainboard/intel/adlrvp/memory.c
index 204744f503..29eb74497d 100644
--- a/src/mainboard/intel/adlrvp/memory.c
+++ b/src/mainboard/intel/adlrvp/memory.c
@@ -20,6 +20,8 @@ static const struct mb_cfg ddr4_mem_config = {
 
 	.UserBd = BOARD_TYPE_MOBILE,
 
+	.LpDdrDqDqsReTraining = 1,
+
 	.ddr_config = {
 		.dq_pins_interleaved = false,
 	},
@@ -76,6 +78,8 @@ static const struct mb_cfg lpddr4_mem_config = {
 		.ddr7 = { .dqs0 = 0, .dqs1 = 1 },
 	},
 
+	.LpDdrDqDqsReTraining = 1,
+
 	.ect = true, /* Early Command Training */
 
 	.UserBd = BOARD_TYPE_MOBILE,
@@ -134,6 +138,8 @@ static const struct mb_cfg lp5_mem_config = {
 
 	.ect = false, /* Early Command Training */
 
+	.LpDdrDqDqsReTraining = 1,
+
 	.UserBd = BOARD_TYPE_MOBILE,
 
 	.lp5x_config = {
@@ -156,6 +162,8 @@ static const struct mb_cfg ddr5_mem_config = {
 
 	.UserBd = BOARD_TYPE_MOBILE,
 
+	.LpDdrDqDqsReTraining = 1,
+
 	.ddr_config = {
 		.dq_pins_interleaved = false,
 	}
@@ -214,6 +222,10 @@ static const struct mb_cfg adlm_lp4_mem_config = {
 
 	.ect = true, /* Early Command Training */
 
+	.CmdMirror = 0xCC,
+
+	.LpDdrDqDqsReTraining = 1,
+
 	.UserBd = BOARD_TYPE_ULT_ULX,
 };