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mb/intel/icelake_rvp: Enable dptf functionality 

Enable dptf functionality for IceLake based U and Y systems.

Change-Id: I8ef396f9df8e39300d5870fd9a147ecdd6f0ba90
Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-on: https://review.coreboot.org/c/29686
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
This commit is contained in:
Sumeet Pawnikar 2018-11-19 12:29:51 +05:30 committed by Patrick Georgi
parent 6f86ff3ac8
commit 01f96d78ff
2 changed files with 6 additions and 0 deletions
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3
src/mainboard/intel/icelake_rvp/variants/icl_u/devicetree.cb
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@ -157,6 +157,9 @@ chip soc/intel/icelake
# Enable "Intel Speed Shift Technology" # Enable "Intel Speed Shift Technology"
register "speed_shift_enable" = "1" register "speed_shift_enable" = "1"
# Enable DPTF
register "dptf_enable" = "1"
# GPIO for SD card detect # GPIO for SD card detect
register "sdcard_cd_gpio" = "GPP_G5" register "sdcard_cd_gpio" = "GPP_G5"

3
src/mainboard/intel/icelake_rvp/variants/icl_y/devicetree.cb
View File

@ -157,6 +157,9 @@ chip soc/intel/icelake
# Enable "Intel Speed Shift Technology" # Enable "Intel Speed Shift Technology"
register "speed_shift_enable" = "1" register "speed_shift_enable" = "1"
# Enable DPTF
register "dptf_enable" = "1"
# GPIO for SD card detect # GPIO for SD card detect
register "sdcard_cd_gpio" = "GPP_G5" register "sdcard_cd_gpio" = "GPP_G5"