GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

mb/asus/f2a85-m_pro: Enable GPIO0 on the super I/O 

It is enabled by the vendor firmware.

Also drop spurious `io 0x60 = 0x00` setting. It's the default anyway
and the resource is kept disabled (it's controlled by the virtual
LDN 2e.008).

This fixes the hang in `PCI: 00:14.3 init` when doing
`outb(0, DMA1_RESET_REG)`.

Fixes: 2f8192bc ("asus/f2a85m_pro: Fix superio type in devicetree")
Change-Id: I351c93033bf2afd824eb6baa8d7625e7a33a295a
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46015
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Nico Huber 2020-10-04 15:03:09 +02:00
parent e50f546e01
commit 0258465373
1 changed files with 3 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
src/mainboard/asus/f2a85-m/devicetree_f2a85-m_pro.cb
View File

@ -61,8 +61,9 @@ chip northbridge/amd/agesa/family15tn/root_complex
irq 0xf7 = 0x00
irq 0xf8 = 0x00
end
device pnp 2e.8 off # WDT1, GPIO0, GPIO1
io 0x60 = 0x00
device pnp 2e.008 off # WDT1
end
device pnp 2e.108 on # GPIO0, GPIO1
irq 0xe0 = 0xff
irq 0xe1 = 0xff
irq 0xe2 = 0xff