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Remove chip.h files without config structure 

Also deletes files not included in build:
    src/southbridge/amd/cimx/sb700/chip_name.c
    src/southbridge/amd/cimx/sb800/chip_name.c
    src/southbridge/amd/cimx/sb900/chip_name.c

Change-Id: I2068e3859157b758ccea0ca91fa47d09a8639361
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/1473
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Marc Jones <marcj303@gmail.com>
This commit is contained in:
Kyösti Mälkki 2012-08-24 21:54:10 +03:00 committed by Patrick Georgi
parent 1f0d379a7e
commit 02790369ff
183 changed files with 0 additions and 1531 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

21
src/cpu/amd/agesa/family10/chip.h
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@ -1,21 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2011 Advanced Micro Devices, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
struct cpu_amd_agesa_family10_config {
};

1
src/cpu/amd/agesa/family10/chip_name.c
View File

@ -18,7 +18,6 @@
*/ */
#include <device/device.h> #include <device/device.h>
#include "chip.h"
struct chip_operations cpu_amd_agesa_family10_ops = { struct chip_operations cpu_amd_agesa_family10_ops = {
CHIP_NAME("AMD CPU Family 10h") CHIP_NAME("AMD CPU Family 10h")

21
src/cpu/amd/agesa/family12/chip.h
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@ -1,21 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2011 Advanced Micro Devices, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
struct cpu_amd_agesa_family12_config {
};

1
src/cpu/amd/agesa/family12/chip_name.c
View File

@ -18,7 +18,6 @@
*/ */
#include <device/device.h> #include <device/device.h>
#include "chip.h"
struct chip_operations cpu_amd_agesa_family12_ops = { struct chip_operations cpu_amd_agesa_family12_ops = {
CHIP_NAME("AMD CPU Family 12h") CHIP_NAME("AMD CPU Family 12h")

21
src/cpu/amd/agesa/family14/chip.h
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@ -1,21 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2011 Advanced Micro Devices, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
struct cpu_amd_agesa_family14_config {
};

1
src/cpu/amd/agesa/family14/chip_name.c
View File

@ -18,7 +18,6 @@
*/ */
#include <device/device.h> #include <device/device.h>
#include "chip.h"
struct chip_operations cpu_amd_agesa_family14_ops = { struct chip_operations cpu_amd_agesa_family14_ops = {
CHIP_NAME("AMD CPU Family 14h") CHIP_NAME("AMD CPU Family 14h")

21
src/cpu/amd/agesa/family15/chip.h
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@ -1,21 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2012 Advanced Micro Devices, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
struct cpu_amd_agesa_family15_config {
};

1
src/cpu/amd/agesa/family15/chip_name.c
View File

@ -18,7 +18,6 @@
*/ */
#include <device/device.h> #include <device/device.h>
#include "chip.h"
struct chip_operations cpu_amd_agesa_family15_ops = { struct chip_operations cpu_amd_agesa_family15_ops = {
CHIP_NAME("AMD CPU Family 15h") CHIP_NAME("AMD CPU Family 15h")

21
src/cpu/amd/agesa/family15tn/chip.h
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@ -1,21 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2012 Advanced Micro Devices, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
struct cpu_amd_agesa_family15tn_config {
};

1
src/cpu/amd/agesa/family15tn/chip_name.c
View File

@ -18,7 +18,6 @@
*/ */
#include <device/device.h> #include <device/device.h>
#include "chip.h"
struct chip_operations cpu_amd_agesa_family15tn_ops = { struct chip_operations cpu_amd_agesa_family15tn_ops = {
CHIP_NAME("AMD CPU Family 15h") CHIP_NAME("AMD CPU Family 15h")

2
src/cpu/amd/sc520/chip.h
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@ -1,2 +0,0 @@
struct cpu_amd_sc520_config {
};

1
src/cpu/amd/sc520/sc520.c
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@ -14,7 +14,6 @@
#include <string.h> #include <string.h>
#include <bitops.h> #include <bitops.h>
#include <delay.h> #include <delay.h>
#include "chip.h"
/* /*
* set up basic things ... * set up basic things ...

2
src/cpu/amd/socket_754/chip.h
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@ -1,2 +0,0 @@
struct cpu_amd_socket_754_config {
};

1
src/cpu/amd/socket_754/socket_754.c
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@ -1,5 +1,4 @@
#include <device/device.h> #include <device/device.h>
#include "chip.h"
struct chip_operations cpu_amd_socket_754_ops = { struct chip_operations cpu_amd_socket_754_ops = {

2
src/cpu/amd/socket_939/chip.h
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@ -1,2 +0,0 @@
struct cpu_amd_socket_939_config {
};

1
src/cpu/amd/socket_939/socket_939.c
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@ -1,5 +1,4 @@
#include <device/device.h> #include <device/device.h>
#include "chip.h"
struct chip_operations cpu_amd_socket_939_ops = { struct chip_operations cpu_amd_socket_939_ops = {
CHIP_NAME("Socket 939 CPU") CHIP_NAME("Socket 939 CPU")

2
src/cpu/amd/socket_940/chip.h
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@ -1,2 +0,0 @@
struct cpu_amd_socket_940_config {
};

1
src/cpu/amd/socket_940/socket_940.c
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@ -1,5 +1,4 @@
#include <device/device.h> #include <device/device.h>
#include "chip.h"
struct chip_operations cpu_amd_socket_940_ops = { struct chip_operations cpu_amd_socket_940_ops = {
CHIP_NAME("Socket 940 CPU") CHIP_NAME("Socket 940 CPU")

2
src/cpu/amd/socket_AM2/chip.h
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@ -1,2 +0,0 @@
struct cpu_amd_socket_AM2_config {
};

1
src/cpu/amd/socket_AM2/socket_AM2.c
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@ -1,5 +1,4 @@
#include <device/device.h> #include <device/device.h>
#include "chip.h"
struct chip_operations cpu_amd_socket_AM2_ops = { struct chip_operations cpu_amd_socket_AM2_ops = {
CHIP_NAME("Socket AM2 CPU") CHIP_NAME("Socket AM2 CPU")

21
src/cpu/amd/socket_AM2r2/chip.h
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@ -1,21 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2007 Advanced Micro Devices, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
struct cpu_amd_socket_AM2r2_config {
};

1
src/cpu/amd/socket_AM2r2/socket_AM2r2.c
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@ -18,7 +18,6 @@
*/ */
#include <device/device.h> #include <device/device.h>
#include "chip.h"
struct chip_operations cpu_amd_socket_AM2r2_ops = { struct chip_operations cpu_amd_socket_AM2r2_ops = {
CHIP_NAME("socket AM2r2") CHIP_NAME("socket AM2r2")

21
src/cpu/amd/socket_AM3/chip.h
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@ -1,21 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2010 Advanced Micro Devices, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
struct cpu_amd_socket_AM3_config {
};

1
src/cpu/amd/socket_AM3/socket_AM3.c
View File

@ -18,7 +18,6 @@
*/ */
#include <device/device.h> #include <device/device.h>
#include "chip.h"
struct chip_operations cpu_amd_socket_AM3_ops = { struct chip_operations cpu_amd_socket_AM3_ops = {
CHIP_NAME("socket AM3") CHIP_NAME("socket AM3")

21
src/cpu/amd/socket_ASB2/chip.h
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@ -1,21 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2010 Advanced Micro Devices, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
struct cpu_amd_socket_ASB2_config {
};

1
src/cpu/amd/socket_ASB2/socket_ASB2.c
View File

@ -18,7 +18,6 @@
*/ */
#include <device/device.h> #include <device/device.h>
#include "chip.h"
struct chip_operations cpu_amd_socket_ASB2_ops = { struct chip_operations cpu_amd_socket_ASB2_ops = {
CHIP_NAME("socket ASB2") CHIP_NAME("socket ASB2")

21
src/cpu/amd/socket_C32/chip.h
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@ -1,21 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2010 Advanced Micro Devices, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
struct cpu_amd_socket_C32_config {
};

1
src/cpu/amd/socket_C32/socket_C32.c
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@ -18,7 +18,6 @@
*/ */
#include <device/device.h> #include <device/device.h>
#include "chip.h"
struct chip_operations cpu_amd_socket_C32_ops = { struct chip_operations cpu_amd_socket_C32_ops = {
CHIP_NAME("socket C32") CHIP_NAME("socket C32")

2
src/cpu/amd/socket_F/chip.h
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@ -1,2 +0,0 @@
struct cpu_amd_socket_F_config {
};

1
src/cpu/amd/socket_F/socket_F.c
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@ -1,5 +1,4 @@
#include <device/device.h> #include <device/device.h>
#include "chip.h"
struct chip_operations cpu_amd_socket_F_ops = { struct chip_operations cpu_amd_socket_F_ops = {
CHIP_NAME("Socket F CPU") CHIP_NAME("Socket F CPU")

21
src/cpu/amd/socket_F_1207/chip.h
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@ -1,21 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2007 Advanced Micro Devices, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
struct cpu_amd_socket_F_1207_config {
};

1
src/cpu/amd/socket_F_1207/socket_F_1207.c
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@ -18,7 +18,6 @@
*/ */
#include <device/device.h> #include <device/device.h>
#include "chip.h"
struct chip_operations cpu_amd_socket_F_1207_ops = { struct chip_operations cpu_amd_socket_F_1207_ops = {
CHIP_NAME("socket F_1207") CHIP_NAME("socket F_1207")

2
src/cpu/amd/socket_S1G1/chip.h
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@ -1,2 +0,0 @@
struct cpu_amd_socket_S1G1_config {
};

1
src/cpu/amd/socket_S1G1/socket_S1G1.c
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@ -1,5 +1,4 @@
#include <device/device.h> #include <device/device.h>
#include "chip.h"
struct chip_operations cpu_amd_socket_S1G1_ops = { struct chip_operations cpu_amd_socket_S1G1_ops = {
CHIP_NAME("Socket S1G1 CPU") CHIP_NAME("Socket S1G1 CPU")

21
src/cpu/intel/ep80579/chip.h
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@ -1,21 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2008 Arastra, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
struct cpu_intel_ep80579_config {
};

1
src/cpu/intel/ep80579/ep80579.c
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@ -18,7 +18,6 @@
*/ */
#include <device/device.h> #include <device/device.h>
#include "chip.h"
struct chip_operations cpu_intel_ep80579_ops = { struct chip_operations cpu_intel_ep80579_ops = {
CHIP_NAME("EP80579 CPU") CHIP_NAME("EP80579 CPU")

22
src/cpu/intel/slot_1/chip.h
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@ -1,22 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2010 Keith Hui <buurin@gmail.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
struct cpu_intel_slot_1_config {
};

1
src/cpu/intel/slot_1/slot_1.c
View File

@ -19,7 +19,6 @@
*/ */
#include <device/device.h> #include <device/device.h>
#include "chip.h"
struct chip_operations cpu_intel_slot_1_ops = { struct chip_operations cpu_intel_slot_1_ops = {
CHIP_NAME("Slot 1 CPU") CHIP_NAME("Slot 1 CPU")

2
src/cpu/intel/slot_2/chip.h
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@ -1,2 +0,0 @@
struct cpu_intel_slot_2_config {
};

1
src/cpu/intel/slot_2/slot_2.c
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@ -1,5 +1,4 @@
#include <device/device.h> #include <device/device.h>
#include "chip.h"
struct chip_operations cpu_intel_slot_2_ops = { struct chip_operations cpu_intel_slot_2_ops = {

21
src/cpu/intel/socket_441/chip.h
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@ -1,21 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2009 coresystems GmbH
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
struct cpu_intel_socket_441_config {
};

1
src/cpu/intel/socket_441/socket_441.c
View File

@ -18,7 +18,6 @@
*/ */
#include <device/device.h> #include <device/device.h>
#include "chip.h"
struct chip_operations cpu_intel_socket_441_ops = { struct chip_operations cpu_intel_socket_441_ops = {
CHIP_NAME("Socket 441 CPU") CHIP_NAME("Socket 441 CPU")

2
src/cpu/intel/socket_BGA956/chip.h
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@ -1,2 +0,0 @@
struct cpu_intel_socket_BGA956_config {
};

1
src/cpu/intel/socket_BGA956/socket_BGA956.c
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@ -1,5 +1,4 @@
#include <device/device.h> #include <device/device.h>
#include "chip.h"
struct chip_operations cpu_intel_socket_BGA956_ops = { struct chip_operations cpu_intel_socket_BGA956_ops = {
CHIP_NAME("Socket BGA956 CPU") CHIP_NAME("Socket BGA956 CPU")

22
src/cpu/intel/socket_FC_PGA370/chip.h
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@ -1,22 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2010 Joseph Smith <joe@settoplinux.org>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
struct cpu_intel_socket_FC_PGA370_config {
};

1
src/cpu/intel/socket_FC_PGA370/socket_FC_PGA370.c
View File

@ -19,7 +19,6 @@
*/ */
#include <device/device.h> #include <device/device.h>
#include "chip.h"
struct chip_operations cpu_intel_socket_FC_PGA370_ops = { struct chip_operations cpu_intel_socket_FC_PGA370_ops = {
CHIP_NAME("(FC)PGA370 CPU") CHIP_NAME("(FC)PGA370 CPU")

2
src/cpu/intel/socket_LGA771/chip.h
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@ -1,2 +0,0 @@
struct cpu_intel_socket_LGA771_config {
};

1
src/cpu/intel/socket_LGA771/socket_LGA771.c
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@ -1,5 +1,4 @@
#include <device/device.h> #include <device/device.h>
#include "chip.h"
struct chip_operations cpu_intel_socket_LGA771_ops = { struct chip_operations cpu_intel_socket_LGA771_ops = {

2
src/cpu/intel/socket_PGA370/chip.h
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@ -1,2 +0,0 @@
struct cpu_intel_socket_PGA370_config {
};

1
src/cpu/intel/socket_PGA370/socket_PGA370.c
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@ -1,5 +1,4 @@
#include <device/device.h> #include <device/device.h>
#include "chip.h"
struct chip_operations cpu_intel_socket_PGA370_ops = { struct chip_operations cpu_intel_socket_PGA370_ops = {
CHIP_NAME("Socket PGA370 CPU") CHIP_NAME("Socket PGA370 CPU")

2
src/cpu/intel/socket_mFCBGA479/chip.h
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@ -1,2 +0,0 @@
struct cpu_intel_socket_mFCBGA479_config {
};

1
src/cpu/intel/socket_mFCBGA479/socket_mFCBGA479.c
View File

@ -1,5 +1,4 @@
#include <device/device.h> #include <device/device.h>
#include "chip.h"
struct chip_operations cpu_intel_socket_mFCBGA479_ops = { struct chip_operations cpu_intel_socket_mFCBGA479_ops = {
CHIP_NAME("Micro-FCBGA 479 CPU") CHIP_NAME("Micro-FCBGA 479 CPU")

2
src/cpu/intel/socket_mFCPGA478/chip.h
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@ -1,2 +0,0 @@
struct cpu_intel_socket_mFCPGA478_config {
};

1
src/cpu/intel/socket_mFCPGA478/socket_mFCPGA478.c
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@ -1,5 +1,4 @@
#include <device/device.h> #include <device/device.h>
#include "chip.h"
struct chip_operations cpu_intel_socket_mFCPGA478_ops = { struct chip_operations cpu_intel_socket_mFCPGA478_ops = {

2
src/cpu/intel/socket_mPGA478/chip.h
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@ -1,2 +0,0 @@
struct cpu_intel_socket_mPGA478_config {
};

1
src/cpu/intel/socket_mPGA478/socket_mPGA478.c
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@ -1,5 +1,4 @@
#include <device/device.h> #include <device/device.h>
#include "chip.h"
struct chip_operations cpu_intel_socket_mPGA478_ops = { struct chip_operations cpu_intel_socket_mPGA478_ops = {

2
src/cpu/intel/socket_mPGA479M/chip.h
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@ -1,2 +0,0 @@
struct cpu_intel_socket_mPGA479M_config {
};

1
src/cpu/intel/socket_mPGA479M/socket_mPGA479M.c
View File

@ -1,5 +1,4 @@
#include <device/device.h> #include <device/device.h>
#include "chip.h"
struct chip_operations cpu_intel_socket_mPGA479M_ops = { struct chip_operations cpu_intel_socket_mPGA479M_ops = {

2
src/cpu/intel/socket_mPGA603/chip.h
View File

@ -1,2 +0,0 @@
struct cpu_intel_socket_mPGA603_config {
};

1
src/cpu/intel/socket_mPGA603/socket_mPGA603_400Mhz.c
View File

@ -1,5 +1,4 @@
#include <device/device.h> #include <device/device.h>
#include "chip.h"
struct chip_opertations cpu_intel_socket_mPGA603_ops = { struct chip_opertations cpu_intel_socket_mPGA603_ops = {

2
src/cpu/intel/socket_mPGA604/chip.h
View File

@ -1,2 +0,0 @@
struct cpu_intel_socket_mPGA604_config {
};

1
src/cpu/intel/socket_mPGA604/socket_mPGA604.c
View File

@ -1,5 +1,4 @@
#include <device/device.h> #include <device/device.h>
#include "chip.h"
struct chip_operations cpu_intel_socket_mPGA604_ops = { struct chip_operations cpu_intel_socket_mPGA604_ops = {

2
src/cpu/intel/socket_rPGA989/chip.h
View File

@ -1,2 +0,0 @@
struct cpu_intel_socket_rPGA989_config {
};

1
src/cpu/intel/socket_rPGA989/socket_rPGA989.c
View File

@ -1,5 +1,4 @@
#include <device/device.h> #include <device/device.h>
#include "chip.h"
struct chip_operations cpu_intel_socket_rPGA989_ops = { struct chip_operations cpu_intel_socket_rPGA989_ops = {
CHIP_NAME("Socket rPGA989 CPU") CHIP_NAME("Socket rPGA989 CPU")

2
src/drivers/generic/debug/chip.h
View File

@ -1,2 +0,0 @@
struct drivers_generic_debug_config {
};

1
src/drivers/generic/debug/debug_dev.c
View File

@ -7,7 +7,6 @@
#include <cpu/x86/msr.h> #include <cpu/x86/msr.h>
#include <reset.h> #include <reset.h>
#include <delay.h> #include <delay.h>
#include "chip.h"
static void print_pci_regs(struct device *dev) static void print_pci_regs(struct device *dev)
{ {

1
src/drivers/i2c/adm1026/adm1026.c
View File

@ -5,7 +5,6 @@
#include <device/pci_ids.h> #include <device/pci_ids.h>
#include <device/pci_ops.h> #include <device/pci_ops.h>
#include <cpu/x86/msr.h> #include <cpu/x86/msr.h>
#include "chip.h"
#define ADM1026_DEVICE 0x2d /* Either 0x2c or 0x2d or 0x2e */ #define ADM1026_DEVICE 0x2d /* Either 0x2c or 0x2d or 0x2e */
#define ADM1026_REG_CONFIG1 0x00 #define ADM1026_REG_CONFIG1 0x00

2
src/drivers/i2c/adm1026/chip.h
View File

@ -1,2 +0,0 @@
struct drivers_i2c_adm1026_config {
};

1
src/drivers/i2c/adm1027/adm1027.c
View File

@ -5,7 +5,6 @@
#include <device/pci_ids.h> #include <device/pci_ids.h>
#include <device/pci_ops.h> #include <device/pci_ops.h>
#include <cpu/x86/msr.h> #include <cpu/x86/msr.h>
#include "chip.h"
#define ADM1027_REG_CONFIG1 0x40 #define ADM1027_REG_CONFIG1 0x40
#define CFG1_STRT 0x01 #define CFG1_STRT 0x01

2
src/drivers/i2c/adm1027/chip.h
View File

@ -1,2 +0,0 @@
struct drivers_i2c_adm1027_config {
};

1
src/drivers/i2c/adt7463/adt7463.c
View File

@ -23,7 +23,6 @@
#include <device/device.h> #include <device/device.h>
#include <console/console.h> #include <console/console.h>
#include <device/smbus.h> #include <device/smbus.h>
#include "chip.h"
/** /**
* Do some S2881-specific HWM initialization for the ADT7463 chip. * Do some S2881-specific HWM initialization for the ADT7463 chip.

2
src/drivers/i2c/adt7463/chip.h
View File

@ -1,2 +0,0 @@
struct drivers_i2c_adt7463_config {
};

2
src/drivers/i2c/i2cmux/chip.h
View File

@ -1,2 +0,0 @@
struct drivers_i2c_i2cmux_config {
};

1
src/drivers/i2c/i2cmux/i2cmux.c
View File

@ -5,7 +5,6 @@
#include <device/pci_ids.h> #include <device/pci_ids.h>
#include <device/pci_ops.h> #include <device/pci_ops.h>
#include <cpu/x86/msr.h> #include <cpu/x86/msr.h>
#include "chip.h"
static void i2cmux_set_link(device_t dev, unsigned int link) static void i2cmux_set_link(device_t dev, unsigned int link)
{ {

2
src/drivers/i2c/i2cmux2/chip.h
View File

@ -1,2 +0,0 @@
struct drivers_i2c_i2cmux2_config {
};

1
src/drivers/i2c/i2cmux2/i2cmux2.c
View File

@ -5,7 +5,6 @@
#include <device/pci_ids.h> #include <device/pci_ids.h>
#include <device/pci_ops.h> #include <device/pci_ops.h>
#include <cpu/x86/msr.h> #include <cpu/x86/msr.h>
#include "chip.h"
static void i2cmux2_set_link(device_t dev, unsigned int link) static void i2cmux2_set_link(device_t dev, unsigned int link)
{ {

2
src/drivers/i2c/lm63/chip.h
View File

@ -1,2 +0,0 @@
struct drivers_i2c_lm63_config {
};

1
src/drivers/i2c/lm63/lm63.c
View File

@ -5,7 +5,6 @@
#include <device/pci_ids.h> #include <device/pci_ids.h>
#include <device/pci_ops.h> #include <device/pci_ops.h>
#include <cpu/x86/msr.h> #include <cpu/x86/msr.h>
#include "chip.h"
static void lm63_init(device_t dev) static void lm63_init(device_t dev)
{ {

2
src/drivers/i2c/w83795/chip.h
View File

@ -1,2 +0,0 @@
struct drivers_i2c_w83795_config {
};

2
src/mainboard/emulation/qemu-x86/chip.h
View File

@ -1,2 +0,0 @@
struct mainboard_emulation_qemu_x86_config {};

1
src/mainboard/emulation/qemu-x86/northbridge.c
View File

@ -8,7 +8,6 @@
#include <stdlib.h> #include <stdlib.h>
#include <string.h> #include <string.h>
#include <bitops.h> #include <bitops.h>
#include "chip.h"
#include <delay.h> #include <delay.h>
#include <smbios.h> #include <smbios.h>

23
src/northbridge/amd/agesa/family10/chip.h
View File

@ -1,23 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2011 Advanced Micro Devices, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
struct northbridge_amd_agesa_family10_config
{
};

2
src/northbridge/amd/agesa/family10/northbridge.c
View File

@ -39,10 +39,8 @@
#include <Porting.h> #include <Porting.h>
#include <AGESA.h> #include <AGESA.h>
#include <Options.h> #include <Options.h>
#include "root_complex/chip.h"
#include "northbridge.h" #include "northbridge.h"
#include "amdfam10.h" #include "amdfam10.h"
#include "chip.h"
extern uint32_t agesawrapper_amdinitmid(void); extern uint32_t agesawrapper_amdinitmid(void);

23
src/northbridge/amd/agesa/family10/root_complex/chip.h
View File

@ -1,23 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2011 Advanced Micro Devices, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
struct northbridge_amd_agesa_family10_root_complex_config
{
};

23
src/northbridge/amd/agesa/family12/chip.h
View File

@ -1,23 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2011 Advanced Micro Devices, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
struct northbridge_amd_agesa_family12_config
{
};

1
src/northbridge/amd/agesa/family12/northbridge.c
View File

@ -33,7 +33,6 @@
#include <cpu/x86/lapic.h> #include <cpu/x86/lapic.h>
#include <cpu/amd/mtrr.h> #include <cpu/amd/mtrr.h>
#include "chip.h"
#include "northbridge.h" #include "northbridge.h"
#include "SbEarly.h" #include "SbEarly.h"
#include "agesawrapper.h" #include "agesawrapper.h"

23
src/northbridge/amd/agesa/family12/root_complex/chip.h
View File

@ -1,23 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2011 Advanced Micro Devices, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
struct northbridge_amd_agesa_family12_root_complex_config
{
};

23
src/northbridge/amd/agesa/family14/chip.h
View File

@ -1,23 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2011 Advanced Micro Devices, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
struct northbridge_amd_agesa_family14_config
{
};

1
src/northbridge/amd/agesa/family14/northbridge.c
View File

@ -34,7 +34,6 @@
#include <cpu/amd/mtrr.h> #include <cpu/amd/mtrr.h>
#include "agesawrapper.h" #include "agesawrapper.h"
#include "chip.h"
#include "northbridge.h" #include "northbridge.h"
#if CONFIG_AMD_SB_CIMX #if CONFIG_AMD_SB_CIMX
#include <sb_cimx.h> #include <sb_cimx.h>

23
src/northbridge/amd/agesa/family14/root_complex/chip.h
View File

@ -1,23 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2011 Advanced Micro Devices, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
struct northbridge_amd_agesa_family14_root_complex_config
{
};

23
src/northbridge/amd/agesa/family15/chip.h
View File

@ -1,23 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2012 Advanced Micro Devices, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
struct northbridge_amd_agesa_family15_config
{
};

2
src/northbridge/amd/agesa/family15/northbridge.c
View File

@ -40,9 +40,7 @@
#include <cpu/amd/amdfam15.h> #include <cpu/amd/amdfam15.h>
#include <cpuRegisters.h> #include <cpuRegisters.h>
#include "agesawrapper.h" #include "agesawrapper.h"
#include "root_complex/chip.h"
#include "northbridge.h" #include "northbridge.h"
#include "chip.h"
#define MAX_NODE_NUMS (MAX_NODES * MAX_DIES) #define MAX_NODE_NUMS (MAX_NODES * MAX_DIES)

23
src/northbridge/amd/agesa/family15/root_complex/chip.h
View File

@ -1,23 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2012 Advanced Micro Devices, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
struct northbridge_amd_agesa_family15_root_complex_config
{
};

23
src/northbridge/amd/agesa/family15tn/chip.h
View File

@ -1,23 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2012 Advanced Micro Devices, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
struct northbridge_amd_agesa_family15tn_config
{
};

2
src/northbridge/amd/agesa/family15tn/northbridge.c
View File

@ -40,9 +40,7 @@
#include <cpu/amd/amdfam15.h> #include <cpu/amd/amdfam15.h>
#include <cpuRegisters.h> #include <cpuRegisters.h>
#include "agesawrapper.h" #include "agesawrapper.h"
#include "root_complex/chip.h"
#include "northbridge.h" #include "northbridge.h"
#include "chip.h"
#define MAX_NODE_NUMS (MAX_NODES * MAX_DIES) #define MAX_NODE_NUMS (MAX_NODES * MAX_DIES)

23
src/northbridge/amd/agesa/family15tn/root_complex/chip.h
View File

@ -1,23 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2012 Advanced Micro Devices, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
struct northbridge_amd_agesa_family15tn_root_complex_config
{
};

23
src/northbridge/amd/amdfam10/chip.h
View File

@ -1,23 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2007 Advanced Micro Devices, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
struct northbridge_amd_amdfam10_config
{
};

2
src/northbridge/amd/amdfam10/northbridge.c
View File

@ -37,8 +37,6 @@
#include <pc80/mc146818rtc.h> #include <pc80/mc146818rtc.h>
#endif #endif
#include "chip.h"
#include "root_complex/chip.h"
#include "northbridge.h" #include "northbridge.h"
#include "amdfam10.h" #include "amdfam10.h"

23
src/northbridge/amd/amdfam10/root_complex/chip.h
View File

@ -1,23 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2007 Advanced Micro Devices, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
struct northbridge_amd_amdfam10_root_complex_config
{
};

4
src/northbridge/amd/amdk8/chip.h
View File

@ -1,4 +0,0 @@
struct northbridge_amd_amdk8_config
{
};

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