diff --git a/src/arch/x86/exit_car.S b/src/arch/x86/exit_car.S
index 61287d2597..86d46ca95b 100644
--- a/src/arch/x86/exit_car.S
+++ b/src/arch/x86/exit_car.S
@@ -27,6 +27,9 @@ post_car_stack_top:
 .text
 .global _start
 _start:
+	/* Assume stack alignment doesn't matter here as chipset_teardown_car
+	   is expected to be implemented in assembly. */
+
 	/* chipset_teardown_car() is expected to disable cache-as-ram. */
 	call	chipset_teardown_car
 
@@ -56,11 +59,20 @@ _start:
 	 */
 
 #if IS_ENABLED(CONFIG_SOC_SETS_MSRS)
-	push	%esp
+
+	mov	%esp, %ebp
+	/* Need to align stack to 16 bytes at the call instruction. Therefore
+	   account for the 1 push. */
+	andl	$0xfffffff0, %esp
+	sub	$12, %esp
+	push	%ebp
 	call	soc_set_mtrrs
+	/* Ignore fixing up %esp since we're setting it a new value. */
 
 	/* eax: new top_of_stack with setup_stack_and_mtrrs data removed */
 	movl	%eax, %esp
+	/* Align stack to 16 bytes at call instruction. */
+	andl	$0xfffffff0, %esp
 	call	soc_enable_mtrrs
 #else /* CONFIG_SOC_SETS_MSRS */
 	/* Clear variable MTRRs. */
@@ -109,6 +121,8 @@ _start:
 	wrmsr
 #endif /* CONFIG_SOC_SETS_MSRS */
 
+	/* Align stack to 16 bytes at call instruction. */
+	andl	$0xfffffff0, %esp
 	/* Call into main for postcar. */
 	call main
 	/* Should never return. */
diff --git a/src/soc/intel/common/block/cpu/car/cache_as_ram.S b/src/soc/intel/common/block/cpu/car/cache_as_ram.S
index 79c5c77d27..94e269446b 100644
--- a/src/soc/intel/common/block/cpu/car/cache_as_ram.S
+++ b/src/soc/intel/common/block/cpu/car/cache_as_ram.S
@@ -184,6 +184,11 @@ car_init_done:
 	/* Setup bootblock stack */
 	mov	$_car_stack_end, %esp
 
+	/* Need to align stack to 16 bytes at call instruction. Account for
+	   the two pushes below. */
+	andl	$0xfffffff0, %esp
+	sub	$8, %esp
+
 	/*push TSC value to stack*/
 	movd	%mm2, %eax
 	pushl	%eax	/* tsc[63:32] */