From 029a4a0b88a9602e80aa35c5a6ba35e44f478d95 Mon Sep 17 00:00:00 2001 From: Felix Held Date: Tue, 3 Aug 2021 03:36:53 +0200 Subject: [PATCH] soc/amd/common/block/gpio_banks: factor out get_gpio_mux Signed-off-by: Felix Held Change-Id: I7d7a8c5a7188fd558a577352f8b246e61f3edd63 Reviewed-on: https://review.coreboot.org/c/coreboot/+/56780 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth --- src/soc/amd/common/block/gpio_banks/gpio.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/src/soc/amd/common/block/gpio_banks/gpio.c b/src/soc/amd/common/block/gpio_banks/gpio.c index d0e8281f2a..018c61430e 100644 --- a/src/soc/amd/common/block/gpio_banks/gpio.c +++ b/src/soc/amd/common/block/gpio_banks/gpio.c @@ -160,15 +160,20 @@ uint16_t gpio_acpi_pin(gpio_t gpio) return gpio; } +static uint8_t get_gpio_mux(gpio_t gpio) +{ + return iomux_read8(gpio); +} + static void set_gpio_mux(gpio_t gpio, uint8_t function) { iomux_write8(gpio, function & AMD_GPIO_MUX_MASK); - iomux_read8(gpio); /* Flush posted write */ + get_gpio_mux(gpio); /* Flush posted write */ } void gpio_save_pin_registers(gpio_t gpio, struct soc_amd_gpio_register_save *save) { - save->mux_value = iomux_read8(gpio); + save->mux_value = get_gpio_mux(gpio); save->control_value = gpio_read32(gpio); }