[REMOVAL] digitallogic/adl855pc
As announced in http://permalink.gmane.org/gmane.linux.bios/81918 I am removing all boards older than 10 years from the tree. Change-Id: I5b0fb633b7611e2a69aeb33cd31ca8fd4a83592c Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-on: http://review.coreboot.org/12369 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
Stefan Reinauer
parent
a2d131511f
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029f3550ef
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if BOARD_DIGITALLOGIC_ADL855PC
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config BOARD_SPECIFIC_OPTIONS # dummy
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def_bool y
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select CPU_INTEL_SOCKET_MPGA479M
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select NORTHBRIDGE_INTEL_I855
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select SOUTHBRIDGE_INTEL_I82801DX
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select SUPERIO_WINBOND_W83627HF
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select HAVE_OPTION_TABLE
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select HAVE_PIRQ_TABLE
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select BOARD_ROMSIZE_KB_1024
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config MAINBOARD_DIR
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string
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default digitallogic/adl855pc
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config MAINBOARD_PART_NUMBER
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string
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default "smartModule855"
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config IRQ_SLOT_COUNT
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int
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default 5
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endif # BOARD_DIGITALLOGIC_ADL855PC
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config BOARD_DIGITALLOGIC_ADL855PC
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bool "smartModule855"
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Category: half
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entries
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0 384 r 0 reserved_memory
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384 1 e 4 boot_option
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388 4 r 0 reboot_bits
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392 3 e 5 baud_rate
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400 1 e 1 power_on_after_fail
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412 4 e 6 debug_level
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456 1 e 1 ECC_memory
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1008 16 h 0 check_sum
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enumerations
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#ID value text
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1 0 Disable
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1 1 Enable
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2 0 Enable
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2 1 Disable
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4 0 Fallback
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4 1 Normal
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5 0 115200
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5 1 57600
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5 2 38400
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5 3 19200
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5 4 9600
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5 5 4800
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5 6 2400
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5 7 1200
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6 6 Notice
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6 7 Info
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6 8 Debug
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6 9 Spew
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checksums
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checksum 392 1007 1008
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chip northbridge/intel/i855
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device domain 0 on
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device pci 0.0 on end
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device pci 1.0 on end
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chip southbridge/intel/i82801dx
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# pci 11.0 on end
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# pci 11.1 on end
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# pci 11.2 on end
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# pci 11.3 on end
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# pci 11.4 on end
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# pci 11.5 on end
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# pci 11.6 on end
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# pci 12.0 on end
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register "enable_usb" = "0"
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register "enable_native_ide" = "0"
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chip superio/winbond/w83627hf # link 1
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device pnp 2e.0 on # Floppy
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io 0x60 = 0x3f0
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irq 0x70 = 6
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drq 0x74 = 2
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end
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device pnp 2e.1 off # Parallel Port
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io 0x60 = 0x378
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irq 0x70 = 7
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end
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device pnp 2e.2 on # Com1
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io 0x60 = 0x3f8
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irq 0x70 = 4
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end
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device pnp 2e.3 off # Com2
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io 0x60 = 0x2f8
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irq 0x70 = 3
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end
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device pnp 2e.5 on # Keyboard
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io 0x60 = 0x60
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io 0x62 = 0x64
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irq 0x70 = 1
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irq 0x72 = 12
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end
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device pnp 2e.6 off end # CIR
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device pnp 2e.7 off end # GAME_MIDI_GIPO1
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device pnp 2e.8 off end # GPIO2
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device pnp 2e.9 off end # GPIO3
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device pnp 2e.a off end # ACPI
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device pnp 2e.b on # HW Monitor
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io 0x60 = 0x290
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end
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end
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end
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end
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device cpu_cluster 0 on
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chip cpu/intel/socket_mPGA479M
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device lapic 0 on end
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end
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end
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end
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#include <arch/pirq_routing.h>
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static const struct irq_routing_table intel_irq_routing_table = {
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PIRQ_SIGNATURE, /* u32 signature */
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PIRQ_VERSION, /* u16 version */
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32+16*CONFIG_IRQ_SLOT_COUNT, /* there can be total CONFIG_IRQ_SLOT_COUNT devices on the bus */
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0, /* Where the interrupt router lies (bus) */
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0x88, /* Where the interrupt router lies (dev) */
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0x1c20, /* IRQs devoted exclusively to PCI usage */
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0x1106, /* Vendor */
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0x8231, /* Device */
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0, /* Miniport data */
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{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
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0x5e, /* u8 checksum , this hase to set to some value that would give 0 after the sum of all bytes for this structure (including checksum) */
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{
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/* 8231 ethernet */
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{0,0x90, {{0x1, 0xdeb8}, {0x2, 0xdeb8}, {0x3, 0xdeb8}, {0x4, 0xdeb8}}, 0x1, 0},
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/* 8231 internal */
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{0,0x88, {{0x2, 0xdeb8}, {0x3, 0xdeb8}, {0x4, 0xdeb8}, {0x1, 0xdeb8}}, 0x2, 0},
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/* PCI slot */
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{0,0xa0, {{0x3, 0xdeb8}, {0x4, 0xdeb8}, {0x1, 0xdeb8}, {0x2, 0xdeb8}}, 0, 0},
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{0,0x50, {{0x4, 0xdeb8}, {0x3, 0xdeb8}, {0x2, 0xdeb8}, {0x1, 0xdeb8}}, 0x3, 0},
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{0,0x98, {{0x4, 0xdeb8}, {0x3, 0xdeb8}, {0x2, 0xdeb8}, {0x1, 0xdeb8}}, 0x4, 0},
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}
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};
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unsigned long write_pirq_routing_table(unsigned long addr)
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{
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return copy_pirq_routing_table(addr, &intel_irq_routing_table);
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}
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#include <stdint.h>
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#include <device/pci_def.h>
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#include <arch/io.h>
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#include <device/pnp_def.h>
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#include <stdlib.h>
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#include <lib.h>
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#include "drivers/pc80/udelay_io.c"
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#include <pc80/mc146818rtc.h>
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#include <console/console.h>
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#include <southbridge/intel/i82801dx/i82801dx.h>
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#include <northbridge/intel/i855/raminit.h>
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#include "northbridge/intel/i855/debug.c"
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#include <superio/winbond/common/winbond.h>
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#include <superio/winbond/w83627hf/w83627hf.h>
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#include <cpu/x86/bist.h>
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#include <spd.h>
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#define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
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static inline int spd_read_byte(unsigned device, unsigned address)
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{
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return smbus_read_byte(device, address);
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}
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#include "northbridge/intel/i855/raminit.c"
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#include "northbridge/intel/i855/reset_test.c"
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#include <cpu/intel/romstage.h>
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void main(unsigned long bist)
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{
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if (bist == 0) {
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#if 0
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enable_lapic();
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init_timer();
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#endif
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}
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winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
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console_init();
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/* Halt if there was a built in self test failure */
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report_bist_failure(bist);
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#if 0
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print_pci_devices();
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#endif
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if (!bios_reset_detected()) {
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enable_smbus();
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#if 0
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dump_spd_registers();
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dump_smbus_registers();
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#endif
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sdram_set_registers();
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sdram_set_spd_registers();
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sdram_enable();
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}
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#if 0
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dump_pci_devices();
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dump_pci_device(PCI_DEV(0, 0, 0));
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#endif
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}
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