mb/google/nissa/var/joxer: Add lock gpio pins
There is a new ground rule, variant should honor baseboard lock gpios. Thus, lock the gpio which is locked in baseboard. BUG=b:216671701 TEST=build passed. Signed-off-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Change-Id: Ia087b62904fd515bf73960a188b225f1d49197dd Reviewed-on: https://review.coreboot.org/c/coreboot/+/65646 Reviewed-by: Reka Norman <rekanorman@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -8,16 +8,16 @@
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/* Pad configuration in ramstage */
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static const struct pad_config override_gpio_table[] = {
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/* B5 : SOC_I2C_SUB_SDA ==> NC */
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PAD_NC(GPP_B5, NONE),
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PAD_NC_LOCK(GPP_B5, NONE, LOCK_CONFIG),
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/* B6 : SOC_I2C_SUB_SCL ==> NC */
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PAD_NC(GPP_B6, NONE),
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PAD_NC_LOCK(GPP_B6, NONE, LOCK_CONFIG),
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/* D3 : WCAM_RST_L ==> NC */
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PAD_NC(GPP_D3, NONE),
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PAD_NC_LOCK(GPP_D3, NONE, LOCK_CONFIG),
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/* D15 : EN_PP2800_WCAM_X ==> NC */
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PAD_NC(GPP_D15, NONE),
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PAD_NC_LOCK(GPP_D15, NONE, LOCK_CONFIG),
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/* D16 : EN_PP1800_PP1200_WCAM_X ==> NC */
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PAD_NC(GPP_D16, NONE),
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PAD_NC_LOCK(GPP_D16, NONE, LOCK_CONFIG),
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/* E20 : DDP2_CTRLCLK ==> NC */
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PAD_NC(GPP_E20, NONE),
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@ -25,11 +25,11 @@ static const struct pad_config override_gpio_table[] = {
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/* F6 : CNV_PA_BLANKING ==> NC */
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PAD_NC(GPP_F6, NONE),
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/* F12 : GSXDOUT ==> NC */
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PAD_NC(GPP_F12, NONE),
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PAD_NC_LOCK(GPP_F12, NONE, LOCK_CONFIG),
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/* F13 : GSXSLOAD ==> NC */
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PAD_NC(GPP_F13, NONE),
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/* F15 : GSXSRESET# ==> NC */
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PAD_NC(GPP_F15, NONE),
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PAD_NC_LOCK(GPP_F15, NONE, LOCK_CONFIG),
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/* H8 : CNV_MFUART2_RXD ==> NC */
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PAD_NC(GPP_H8, NONE),
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