diff --git a/src/northbridge/intel/i945/i945.h b/src/northbridge/intel/i945/i945.h
index 4b79b2b145..e809794700 100644
--- a/src/northbridge/intel/i945/i945.h
+++ b/src/northbridge/intel/i945/i945.h
@@ -3,16 +3,7 @@
 #ifndef NORTHBRIDGE_INTEL_I945_H
 #define NORTHBRIDGE_INTEL_I945_H
 
-/* Northbridge BARs */
-#define DEFAULT_X60BAR		0xfed13000
-#ifndef __ACPI__
-#define DEFAULT_MCHBAR		((u8 *)0xfed14000)	/* 16 KB */
-#define DEFAULT_DMIBAR		((u8 *)0xfed18000)	/* 4 KB */
-#else
-#define DEFAULT_MCHBAR		0xfed14000	/* 16 KB */
-#define DEFAULT_DMIBAR		0xfed18000	/* 4 KB */
-#endif
-#define DEFAULT_EPBAR		0xfed19000	/* 4 KB */
+#include "memmap.h"
 
 #include <southbridge/intel/i82801gx/i82801gx.h>
 
diff --git a/src/northbridge/intel/i945/memmap.h b/src/northbridge/intel/i945/memmap.h
new file mode 100644
index 0000000000..a890445df9
--- /dev/null
+++ b/src/northbridge/intel/i945/memmap.h
@@ -0,0 +1,17 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#ifndef NORTHBRIDGE_INTEL_I945_MEMMAP_H
+#define NORTHBRIDGE_INTEL_I945_MEMMAP_H
+
+/* Northbridge BARs */
+#define DEFAULT_X60BAR		0xfed13000
+#ifndef __ACPI__
+#define DEFAULT_MCHBAR		((u8 *)0xfed14000)	/* 16 KB */
+#define DEFAULT_DMIBAR		((u8 *)0xfed18000)	/* 4 KB */
+#else
+#define DEFAULT_MCHBAR		0xfed14000	/* 16 KB */
+#define DEFAULT_DMIBAR		0xfed18000	/* 4 KB */
+#endif
+#define DEFAULT_EPBAR		0xfed19000	/* 4 KB */
+
+#endif