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nb/intel/pineview: Use macro names for memory base registers 

Change-Id: I0b79ddcf9248c6a6964dd60e30a6ea18e27bc186
Signed-off-by: Damien Zammit <damien@zamaudio.com>
Reviewed-on: https://review.coreboot.org/13032
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
This commit is contained in:
Damien Zammit 2016-01-18 16:37:41 +11:00 committed by Martin Roth
parent fb456e61a9
commit 02f4764bf3
1 changed files with 3 additions and 3 deletions
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6
src/northbridge/intel/pineview/northbridge.c
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@ -45,15 +45,15 @@ static void mch_domain_read_resources(device_t dev)
pci_domain_read_resources(dev);
/* Top of Upper Usable DRAM, including remap */
touud = pci_read_config16(dev, 0xa2);
touud = pci_read_config16(dev, TOUUD);
touud <<= 20;
/* Top of Lower Usable DRAM */
tolud = pci_read_config16(dev, 0xb0) & 0xfff0;
tolud = pci_read_config16(dev, TOLUD) & 0xfff0;
tolud <<= 16;
/* Top of Memory - does not account for any UMA */
tom = pci_read_config16(dev, 0xa0) & 0x1ff;
tom = pci_read_config16(dev, TOM) & 0x1ff;
tom <<= 27;
printk(BIOS_DEBUG, "TOUUD 0x%llx TOLUD 0x%08x TOM 0x%llx\n",