soc/intel/apollolake: Add function to translate device into ACPI name
Add support for the soc_acpi_name() handler in the device operations structure to translate a device path into ACPI name. In order to make this more complete add some missing devices in include/soc/pci_devs.h. Change-Id: I517bc86d8d9fe70bfa0fc4eb3828681887239587 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://review.coreboot.org/15479 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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@ -39,6 +39,72 @@
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static void *vbt;
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static struct region_device vbt_rdev;
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static const char *soc_acpi_name(struct device *dev)
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{
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if (dev->path.type == DEVICE_PATH_DOMAIN)
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return "PCI0";
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if (dev->path.type != DEVICE_PATH_PCI)
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return NULL;
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switch (dev->path.pci.devfn) {
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/* DSDT: acpi/northbridge.asl */
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case NB_DEVFN:
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return "MCHC";
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/* DSDT: acpi/lpc.asl */
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case LPC_DEVFN:
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return "LPCB";
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/* DSDT: acpi/xhci.asl */
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case XHCI_DEVFN:
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return "XHCI";
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/* DSDT: acpi/pch_hda.asl */
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case HDA_DEVFN:
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return "HDAS";
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/* DSDT: acpi/lpss.asl */
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case LPSS_DEVFN_UART0:
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return "URT1";
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case LPSS_DEVFN_UART1:
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return "URT2";
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case LPSS_DEVFN_UART2:
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return "URT3";
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case LPSS_DEVFN_UART3:
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return "URT4";
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case LPSS_DEVFN_SPI0:
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return "SPI1";
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case LPSS_DEVFN_SPI1:
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return "SPI2";
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case LPSS_DEVFN_SPI2:
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return "SPI3";
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case LPSS_DEVFN_PWM:
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return "PWM";
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case LPSS_DEVFN_I2C0:
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return "I2C0";
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case LPSS_DEVFN_I2C1:
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return "I2C1";
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case LPSS_DEVFN_I2C2:
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return "I2C2";
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case LPSS_DEVFN_I2C3:
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return "I2C3";
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case LPSS_DEVFN_I2C4:
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return "I2C4";
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case LPSS_DEVFN_I2C5:
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return "I2C5";
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case LPSS_DEVFN_I2C6:
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return "I2C6";
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case LPSS_DEVFN_I2C7:
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return "I2C7";
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/* Storage */
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case SDCARD_DEVFN:
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return "SDCD";
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case EMMC_DEVFN:
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return "EMMC";
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case SDIO_DEVFN:
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return "SDIO";
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}
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return NULL;
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}
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static void pci_domain_set_resources(device_t dev)
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{
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assign_resources(dev->link_list);
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@ -51,6 +117,7 @@ static struct device_operations pci_domain_ops = {
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.init = NULL,
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.scan_bus = pci_domain_scan_bus,
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.ops_pci_bus = pci_bus_default_ops,
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.acpi_name = &soc_acpi_name,
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};
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static struct device_operations cpu_bus_ops = {
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@ -35,8 +35,16 @@
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#define NB_DEV_ROOT _PCI_DEV(0x0, 0)
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#define P2SB_DEV _PCI_DEV(0xd, 0)
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#define P2SB_DEVFN _PCI_DEVFN(0xd, 0)
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#define PMC_DEV _PCI_DEV(0xd, 1)
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#define PMC_DEVFN _PCI_DEVFN(0xd, 1)
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#define SPI_DEV _PCI_DEV(0xd, 2)
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#define SPI_DEVFN _PCI_DEVFN(0xd, 2)
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#define HDA_DEV _PCI_DEV(0xe, 0)
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#define HDA_DEVFN _PCI_DEVFN(0xe, 0)
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#define ISH_DEV _PCI_DEV(0x11, 0)
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#define ISH_DEVFN _PCI_DEVFN(0x11, 0)
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@ -86,6 +94,10 @@
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#define LPSS_DEVFN_SPI1 _LPSS_PCI_DEVFN(SPI, 1)
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#define LPSS_DEVFN_SPI2 _LPSS_PCI_DEVFN(SPI, 2)
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/* LPSS PWM */
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#define LPSS_DEV_SLOT_PWM 0x1a
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#define LPSS_DEVFN_PWM _LPSS_PCI_DEVFN(PWM, 0)
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#define SDCARD_DEV _PCI_DEV(0x1b, 0)
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#define SDCARD_DEVFN _PCI_DEVFN(0x1b, 0)
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@ -100,4 +112,5 @@
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#define SMBUS_DEV _PCI_DEV(0x1f, 1)
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#define SMBUS_DEVFN _PCI_DEVFN(0x1f, 1)
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#endif
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