diff --git a/src/soc/intel/fsp_baytrail/Kconfig b/src/soc/intel/fsp_baytrail/Kconfig
index 7e7f217459..ff233083d4 100644
--- a/src/soc/intel/fsp_baytrail/Kconfig
+++ b/src/soc/intel/fsp_baytrail/Kconfig
@@ -46,6 +46,9 @@ config CPU_SPECIFIC_OPTIONS
 	select HAVE_INTEL_FIRMWARE
 	select HAVE_SPI_CONSOLE_SUPPORT
 
+	# Microcode header files are delivered in FSP package
+	select USES_MICROCODE_HEADER_FILES if HAVE_FSP_BIN
+
 config SOC_INTEL_FSP_BAYTRAIL_MD
 	bool
 	default n
@@ -98,6 +101,10 @@ config VGA_BIOS_FILE
 	string
 	default "../intel/cpu/baytrail/vbios/Vga.dat" if VGA_BIOS
 
+config CPU_MICROCODE_HEADER_FILES
+	string
+	default "../intel/cpu/baytrail/microcode/M0130673322.h ../intel/cpu/baytrail/microcode/M0130679901.h ../intel/cpu/baytrail/microcode/M0230672228.h"
+
 ## Baytrail Specific FSP Kconfig
 source src/soc/intel/fsp_baytrail/fsp/Kconfig
 
diff --git a/src/soc/intel/fsp_baytrail/Makefile.inc b/src/soc/intel/fsp_baytrail/Makefile.inc
index f0b69ae69d..54ad88a6fa 100644
--- a/src/soc/intel/fsp_baytrail/Makefile.inc
+++ b/src/soc/intel/fsp_baytrail/Makefile.inc
@@ -55,8 +55,6 @@ ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smm.c
 ramstage-y += placeholders.c
 ramstage-y += i2c.c
 
-cpu_microcode_bins += 3rdparty/blobs/soc/intel/baytrail/microcode.bin
-
 CPPFLAGS_common += -I$(src)/soc/intel/fsp_baytrail/
 CPPFLAGS_common += -I$(src)/soc/intel/fsp_baytrail/fsp