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These are post codes for TIM-5690 LED debug message. 

Signed-off-by: Libra Li <libra.li@technexion.com>
Added object reference to Config.lb, too and
Acked-by: Stefan Reinauer <stepan@coresystems.de>




git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4928 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Libra Li 2009-11-09 11:53:41 +00:00 committed by Stefan Reinauer
parent d27c08c289
commit 031029d4d4
6 changed files with 245 additions and 1 deletions
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1
src/mainboard/technexion/tim5690/Config.lb
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@ -30,6 +30,7 @@ arch i386 end
##
driver mainboard.o
object tn_post_code.o
#dir /drivers/si/3114

3
src/mainboard/technexion/tim5690/Makefile.inc
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@ -29,6 +29,9 @@ obj-$(CONFIG_GENERATE_ACPI_TABLES) += dsdt.o
obj-$(CONFIG_GENERATE_ACPI_TABLES) += acpi_tables.o
obj-$(CONFIG_GENERATE_ACPI_TABLES) += fadt.o
# This is debug message for products of Technexion.
obj-y += tn_post_code.o
# This is part of the conversion to init-obj and away from included code.
initobj-y += crt0.o

10
src/mainboard/technexion/tim5690/cache_as_ram_auto.c
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@ -100,6 +100,10 @@ static inline int spd_read_byte(u32 device, u32 address)
#include "cpu/amd/model_fxx/fidvid.c"
#define TECHNEXION_EARLY_SETUP
#include "tn_post_code.c"
#if CONFIG_USE_FALLBACK_IMAGE == 1
#include "northbridge/amd/amdk8/early_ht.c"
@ -161,6 +165,8 @@ void real_main(unsigned long bist, unsigned long cpu_init_detectedx)
struct cpuid_result cpuid1;
struct sys_info *sysinfo = (struct sys_info *)(CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE);
technexion_post_code_init();
technexion_post_code(LED_MESSAGE_START);
if (bist == 0) {
bsp_apicid = init_cpus(cpu_init_detectedx, sysinfo);
@ -233,7 +239,11 @@ void real_main(unsigned long bist, unsigned long cpu_init_detectedx)
/* It's the time to set ctrl now; */
printk_debug("sysinfo->nodes: %2x sysinfo->ctrl: %2x spd_addr: %2x\n",
sysinfo->nodes, sysinfo->ctrl, spd_addr);
fill_mem_ctrl(sysinfo->nodes, sysinfo->ctrl, spd_addr);
technexion_post_code(LED_MESSAGE_RAM);
sdram_initialize(sysinfo->nodes, sysinfo->ctrl, sysinfo);
rs690_before_pci_init();

10
src/mainboard/technexion/tim5690/mainboard.c
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@ -27,6 +27,7 @@
#include <device/pci_def.h>
#include <../southbridge/amd/sb600/sb600.h>
#include "chip.h"
#include "tn_post_code.h"
#define ADT7461_ADDRESS 0x4C
#define ARA_ADDRESS 0x0C /* Alert Response Address */
@ -44,12 +45,18 @@ extern void lb_add_memory_range(struct lb_memory *mem, uint32_t type,
#define ADT7461_write_byte(address, val) \
do_smbus_write_byte(SMBUS_IO_BASE, ADT7461_ADDRESS, address, val)
/* previous
*/
void tim5690_enable(device_t dev);
int add_mainboard_resources(struct lb_memory *mem);
uint64_t uma_memory_base, uma_memory_size;
/* set thermal config
*/
static void set_thermal_config()
static void set_thermal_config(void)
{
u8 byte;
u16 word;
@ -176,6 +183,7 @@ int add_mainboard_resources(struct lb_memory *mem)
lb_add_memory_range(mem, LB_MEM_RESERVED,
uma_memory_base, uma_memory_size);
#endif
technexion_post_code(LED_MESSAGE_FINISH);
}
struct chip_operations mainboard_ops = {

207
src/mainboard/technexion/tim5690/tn_post_code.c Normal file
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@ -0,0 +1,207 @@
#ifdef TECHNEXION_EARLY_SETUP
#include <arch/cpu.h>
#include "southbridge/amd/sb600/sb600.h"
#else
#include <device/pci.h>
#include <device/pci_ids.h>
#endif
#include "tn_post_code.h"
#ifdef TECHNEXION_EARLY_SETUP
// TechNexion's Post Code Initially.
void technexion_post_code_init(void)
{
uint8_t reg8_data;
device_t dev=0;
// SMBus Module and ACPI Block (Device 20, Function 0)
dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_SB600_SM), 0);
// LED[bit0]:GPIO0
// This is reference SB600 RRG 4.1.1 GPIO
reg8_data = pmio_read(0x60);
reg8_data |= (1<<7); // 1: GPIO if not used by SATA
pmio_write(0x60, reg8_data);
reg8_data = pci_read_config8(dev, 0x80);
reg8_data = ((reg8_data | (1<<0)) & ~(1<<4));
pci_write_config8(dev, 0x80, reg8_data);
// LED[bit1]:GPIO1
// This is reference SB600 RRG 4.1.1 GPIO
reg8_data = pci_read_config8(dev, 0x80);
reg8_data = ((reg8_data | (1<<1)) & ~(1<<5));
pci_write_config8(dev, 0x80, reg8_data);
// LED[bit2]:GPIO4
// This is reference SB600 RRG 4.1.1 GPIO
reg8_data = pmio_read(0x5e);
reg8_data &= ~(1<<7); // 0: GPIO if not used by SATA
pmio_write(0x5e, reg8_data);
reg8_data = pci_read_config8(dev, 0xa8);
reg8_data |= (1<<0);
pci_write_config8(dev, 0xa8, reg8_data);
reg8_data = pci_read_config8(dev, 0xa9);
reg8_data &= ~(1<<0);
pci_write_config8(dev, 0xa9, reg8_data);
// LED[bit3]:GPIO6
// This is reference SB600 RRG 4.1.1 GPIO
reg8_data = pmio_read(0x60);
reg8_data |= (1<<7); // 1: GPIO if not used by SATA
pmio_write(0x60, reg8_data);
reg8_data = pci_read_config8(dev, 0xa8);
reg8_data |= (1<<2);
pci_write_config8(dev, 0xa8, reg8_data);
reg8_data = pci_read_config8(dev, 0xa9);
reg8_data &= ~(1<<2);
pci_write_config8(dev, 0xa9, reg8_data);
// LED[bit4]:GPIO7
// This is reference SB600 RRG 4.1.1 GPIO
reg8_data = pci_read_config8(dev, 0xa8);
reg8_data |= (1<<3);
pci_write_config8(dev, 0xa8, reg8_data);
reg8_data = pci_read_config8(dev, 0xa9);
reg8_data &= ~(1<<3);
pci_write_config8(dev, 0xa9, reg8_data);
// LED[bit5]:GPIO8
// This is reference SB600 RRG 4.1.1 GPIO
reg8_data = pci_read_config8(dev, 0xa8);
reg8_data |= (1<<4);
pci_write_config8(dev, 0xa8, reg8_data);
reg8_data = pci_read_config8(dev, 0xa9);
reg8_data &= ~(1<<4);
pci_write_config8(dev, 0xa9, reg8_data);
// LED[bit6]:GPIO10
// This is reference SB600 RRG 4.1.1 GPIO
reg8_data = pci_read_config8(dev, 0xab);
reg8_data = ((reg8_data | (1<<0)) & ~(1<<1));
pci_write_config8(dev, 0xab, reg8_data);
// LED[bit7]:GPIO66
// This is reference SB600 RRG 4.1.1 GPIO
reg8_data = pmio_read(0x68);
reg8_data &= ~(1<<5); // 0: GPIO
pmio_write(0x68, reg8_data);
reg8_data = pci_read_config8(dev, 0x7e);
reg8_data = ((reg8_data | (1<<1)) & ~(1<<5));
pci_write_config8(dev, 0x7e, reg8_data);
}
#endif
/* TechNexion's Post Code.
*/
void technexion_post_code(uint8_t udata8)
{
uint8_t u8_data;
device_t dev=0;
// SMBus Module and ACPI Block (Device 20, Function 0)
#ifdef TECHNEXION_EARLY_SETUP
dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_SB600_SM), 0);
#else
dev = dev_find_device(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_SB600_SM, 0);
#endif
udata8 = ~(udata8);
// LED[bit0]:GPIO0
u8_data = pci_read_config8(dev, 0x80);
if (udata8 & 0x1) {
u8_data |= (1<<0);
}
else {
u8_data &= ~(1<<0);
}
pci_write_config8(dev, 0x80, u8_data);
// LED[bit1]:GPIO1
u8_data = pci_read_config8(dev, 0x80);
if (udata8 & 0x2) {
u8_data |= (1<<1);
}
else {
u8_data &= ~(1<<1);
}
pci_write_config8(dev, 0x80, u8_data);
// LED[bit2]:GPIO4
u8_data = pci_read_config8(dev, 0xa8);
if (udata8 & 0x4) {
u8_data |= (1<<0);
}
else {
u8_data &= ~(1<<0);
}
pci_write_config8(dev, 0xa8, u8_data);
// LED[bit3]:GPIO6
u8_data = pci_read_config8(dev, 0xa8);
if (udata8 & 0x8) {
u8_data |= (1<<2);
}
else {
u8_data &= ~(1<<2);
}
pci_write_config8(dev, 0xa8, u8_data);
// LED[bit4]:GPIO7
u8_data = pci_read_config8(dev, 0xa8);
if (udata8 & 0x10) {
u8_data |= (1<<3);
}
else {
u8_data &= ~(1<<3);
}
pci_write_config8(dev, 0xa8, u8_data);
// LED[bit5]:GPIO8
u8_data = pci_read_config8(dev, 0xa8);
if (udata8 & 0x20) {
u8_data |= (1<<4);
}
else {
u8_data &= ~(1<<4);
}
pci_write_config8(dev, 0xa8, u8_data);
// LED[bit6]:GPIO10
u8_data = pci_read_config8(dev, 0xab);
if (udata8 & 0x40) {
u8_data |= (1<<0);
}
else {
u8_data &= ~(1<<0);
}
pci_write_config8(dev, 0xab, u8_data);
// LED[bit7]:GPIO66
u8_data = pci_read_config8(dev, 0x7e);
if (udata8 & 0x80) {
u8_data |= (1<<1);
}
else {
u8_data &= ~(1<<1);
}
pci_write_config8(dev, 0x7e, u8_data);
}

15
src/mainboard/technexion/tim5690/tn_post_code.h Normal file
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@ -0,0 +1,15 @@
#define LED_MESSAGE_START 0xFF
#define LED_MESSAGE_FINISH 0x99
#define LED_MESSAGE_RAM 0x01
#ifdef TECHNEXION_EARLY_SETUP
// TechNexion's Post Code Initially.
void technexion_post_code_init(void);
#endif
void technexion_post_code(uint8_t udata8);