GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

mb/amd/mayan: Correct PCIe bridge for M.2 NVMe SSD0 

The M.2 NVMe SSD0 device is behind AMD PCIe bridge 0.2.4 (BDF),
hence update the correct bridge number in the device tree.

TEST: Builds and boots, the device enumerates.
[DEBUG]  PCI: 00:02.4 [1022/14ee] enabled
[DEBUG]  PCI: 01:00.0 [144d/a80a] enabled
Signed-off-by: Anand Vaikar <a.vaikar2021@gmail.com>
Change-Id: I43096beda0405bd392574319d50e7cd6a7f8d291
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74075
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
This commit is contained in:
Anand Vaikar 2023-03-29 15:29:40 +05:30 committed by Felix Held
parent 28eaa4a340
commit 03232e93d3
1 changed files with 1 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
src/mainboard/amd/mayan/devicetree_phoenix.cb
View File

@ -160,7 +160,7 @@ chip soc/amd/phoenix
device ref iommu on end
device ref gpp_bridge_2_1 on end # GBE
device ref gpp_bridge_2_2 on end # WIFI
device ref gpp_bridge_2_3 on end # NVMe SSD
device ref gpp_bridge_2_4 on end # NVMe SSD
device ref gpp_bridge_a on # Internal GPP Bridge 0 to Bus A
device ref gfx on end # Internal GPU (GFX)
device ref gfx_hda on end # Display HD Audio Controller (GFXAZ)