bootmode: Get rid of CONFIG_BOOTMODE_STRAPS

With VBOOT_VERIFY_FIRMWARE separated from CHROMEOS, move recovery and
developer mode check functions to vboot. Thus, get rid of the
BOOTMODE_STRAPS option which controlled these functions under src/lib.

BUG=chrome-os-partner:55639

Change-Id: Ia2571026ce8976856add01095cc6be415d2be22e
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/15868
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Furquan Shaikh 2016-07-25 13:02:36 -07:00
parent 2a12e2e8da
commit 0325dc6f7c
33 changed files with 86 additions and 96 deletions

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@ -82,7 +82,7 @@ subdirs-y += util/cbfstool util/sconfig util/nvramtool util/broadcom
subdirs-y += util/futility util/marvell
subdirs-y += $(wildcard src/arch/*)
subdirs-y += src/mainboard/$(MAINBOARDDIR)
subdirs-$(CONFIG_VBOOT) += src/vboot
subdirs-y += src/vboot
subdirs-y += payloads payloads/external
subdirs-y += site-local

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@ -513,10 +513,6 @@ config MMCONF_SUPPORT
bool
default n
config BOOTMODE_STRAPS
bool
default n
source "src/console/Kconfig"
config HAVE_ACPI_RESUME

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@ -669,8 +669,7 @@ static int should_run_oprom(struct device *dev)
/* Don't run VGA option ROMs, unless we have to print
* something on the screen before the kernel is loaded.
*/
should_run = !IS_ENABLED(CONFIG_BOOTMODE_STRAPS) ||
developer_mode_enabled() || recovery_mode_enabled();
should_run = display_init_required();
#if CONFIG_CHROMEOS
if (!should_run)

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@ -24,7 +24,7 @@
#include <soc/intel/common/mma.h>
#include <string.h>
#include <timestamp.h>
#include <bootmode.h>
#include <vboot/vboot_common.h>
void raminit(struct romstage_params *params)
{
@ -288,7 +288,7 @@ void raminit(struct romstage_params *params)
if (mrc_hob == NULL)
printk(BIOS_DEBUG,
"Memory Configuration Data Hob not present\n");
else if (!recovery_mode_enabled()) {
else if (!vboot_recovery_mode_enabled()) {
/* Do not save MRC data in recovery path */
pei_ptr->data_to_save = GET_GUID_HOB_DATA(mrc_hob);
pei_ptr->data_to_save_size = ALIGN(

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@ -122,7 +122,7 @@ void romstage_common(struct romstage_params *params)
params->pei_data->saved_data_size = 0;
params->pei_data->saved_data = NULL;
if (!params->pei_data->disable_saved_data) {
if (recovery_mode_enabled()) {
if (vboot_recovery_mode_enabled()) {
/* Recovery mode does not use MRC cache */
printk(BIOS_DEBUG,
"Recovery mode: not using MRC cache.\n");

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@ -14,7 +14,6 @@
#include <arch/io.h>
#include <arch/cpu.h>
#include <arch/symbols.h>
#include <bootmode.h>
#include <cbfs.h>
#include <cbmem.h>
#include <console/console.h>
@ -28,6 +27,7 @@
#include <string.h>
#include <symbols.h>
#include <timestamp.h>
#include <vboot/vboot_common.h>
typedef asmlinkage enum fsp_status (*fsp_memory_init_fn)
(void *raminit_upd, void **hob_list);
@ -93,7 +93,7 @@ static enum fsp_status do_fsp_post_memory_init(void *hob_list_ptr, bool s3wake,
/* Now that CBMEM is up, save the list so ramstage can use it */
fsp_save_hob_list(hob_list_ptr);
if (recovery_mode_enabled())
if (vboot_recovery_mode_enabled())
fsp_version = MRC_DEAD_VERSION;
save_memory_training_data(s3wake, fsp_version);
@ -119,7 +119,7 @@ static void fsp_fill_mrc_cache(struct FSPM_ARCH_UPD *arch_upd, bool s3wake,
return;
/* Don't use saved training data when recovery mode is enabled. */
if (recovery_mode_enabled()) {
if (vboot_recovery_mode_enabled()) {
printk(BIOS_DEBUG, "Recovery mode. Not using MRC cache.\n");
return;
}

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@ -16,7 +16,6 @@
#include <stdint.h>
#include <string.h>
#include <console/console.h>
#include <bootmode.h>
#include <arch/io.h>
#include <delay.h>
#include <halt.h>
@ -24,6 +23,7 @@
#include <elog.h>
#include <rtc.h>
#include <stdlib.h>
#include <vboot/vboot_common.h>
#include "chip.h"
#include "ec.h"
@ -198,18 +198,18 @@ void google_chromeec_check_ec_image(int expected_type)
}
}
/* Check for recovery mode and ensure EC is in RO */
/* Check for recovery mode and ensure PD/EC is in RO */
void google_chromeec_early_init(void)
{
if (IS_ENABLED(CONFIG_CHROMEOS)) {
/* Check USB PD chip state first */
if (IS_ENABLED(CONFIG_EC_GOOGLE_CHROMEEC_PD))
google_chromeec_early_pd_init();
if (!IS_ENABLED(CONFIG_CHROMEOS) || !vboot_recovery_mode_enabled())
return;
/* If in recovery ensure EC is running RO firmware. */
if (recovery_mode_enabled())
google_chromeec_check_ec_image(EC_IMAGE_RO);
}
/* Check USB PD chip state first */
if (IS_ENABLED(CONFIG_EC_GOOGLE_CHROMEEC_PD))
google_chromeec_check_pd_image(EC_IMAGE_RO);
/* If in recovery ensure EC is running RO firmware. */
google_chromeec_check_ec_image(EC_IMAGE_RO);
}
void google_chromeec_check_pd_image(int expected_type)
@ -241,15 +241,6 @@ void google_chromeec_check_pd_image(int expected_type)
udelay(1000);
}
}
/* Check for recovery mode and ensure PD is in RO */
void google_chromeec_early_pd_init(void)
{
/* If in recovery ensure PD is running RO firmware. */
if (recovery_mode_enabled()) {
google_chromeec_check_pd_image(EC_IMAGE_RO);
}
}
#endif
u16 google_chromeec_get_board_version(void)
@ -521,7 +512,7 @@ void google_chromeec_init(void)
}
if (cec_cmd.cmd_code ||
(recovery_mode_enabled() &&
(vboot_recovery_mode_enabled() &&
(cec_resp.current_image != EC_IMAGE_RO))) {
struct ec_params_reboot_ec reboot_ec;
/* Reboot the EC and make it come back in RO mode */

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@ -36,7 +36,6 @@ void google_chromeec_init(void);
/* If recovery mode is enabled and EC is not running RO firmware reboot. */
void google_chromeec_early_init(void);
void google_chromeec_early_pd_init(void);
/* Reboot if EC firmware is not expected type. */
void google_chromeec_check_ec_image(int expected_type);
void google_chromeec_check_pd_image(int expected_type);

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@ -26,18 +26,9 @@ int clear_recovery_mode_switch(void);
int get_wipeout_mode_switch(void);
int get_lid_switch(void);
/* Return 1 if display initialization is required. 0 if not. */
int display_init_required(void);
int gfx_get_init_done(void);
void gfx_set_init_done(int done);
#if CONFIG_BOOTMODE_STRAPS
int developer_mode_enabled(void);
int recovery_mode_enabled(void);
#else
static inline int recovery_mode_enabled(void) { return 0; }
static inline int developer_mode_enabled(void) { return 0; }
#endif
#endif /* __BOOTMODE_H__ */

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@ -17,24 +17,6 @@
#include <bootmode.h>
#include <vendorcode/google/chromeos/chromeos.h>
#if CONFIG_BOOTMODE_STRAPS
int developer_mode_enabled(void)
{
if (get_developer_mode_switch())
return 1;
#if CONFIG_VBOOT
if (vboot_handoff_check_developer_flag())
return 1;
#endif
return 0;
}
int recovery_mode_enabled(void)
{
return !!vboot_check_recovery_request();
}
#endif /* CONFIG_BOOTMODE_STRAPS */
#if ENV_RAMSTAGE
static int gfx_init_done = -1;

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@ -40,7 +40,7 @@ void fill_lb_gpios(struct lb_gpios *gpios)
{
struct lb_gpio chromeos_gpios[] = {
{-1, ACTIVE_HIGH, get_write_protect_state(), "write protect"},
{-1, ACTIVE_HIGH, recovery_mode_enabled(), "recovery"},
{-1, ACTIVE_HIGH, vboot_recovery_mode_enabled(), "recovery"},
{-1, ACTIVE_HIGH, get_developer_mode_switch(), "developer"},
{-1, ACTIVE_HIGH, get_lid_switch(), "lid"},
{-1, ACTIVE_HIGH, 0, "power"},

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@ -14,11 +14,12 @@
*/
#include <string.h>
#include <bootmode.h>
#include <arch/io.h>
#include <bootmode.h>
#include <device/device.h>
#include <device/pci.h>
#include <soc/gpio.h>
#include <vboot/vboot_common.h>
#if CONFIG_EC_GOOGLE_CHROMEEC
#include "ec.h"
@ -35,7 +36,7 @@ void fill_lb_gpios(struct lb_gpios *gpios)
{
struct lb_gpio chromeos_gpios[] = {
{-1, ACTIVE_HIGH, get_write_protect_state(), "write protect"},
{-1, ACTIVE_HIGH, recovery_mode_enabled(), "recovery"},
{-1, ACTIVE_HIGH, vboot_recovery_mode_enabled(), "recovery"},
{-1, ACTIVE_HIGH, get_developer_mode_switch(), "developer"},
{-1, ACTIVE_HIGH, get_lid_switch(), "lid"},
{-1, ACTIVE_HIGH, 0, "power"},

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@ -39,8 +39,7 @@ void stout_ec_init(void)
/*
* Important: get_recovery_mode_switch() must be called in EC init.
*/
if (IS_ENABLED(CONFIG_BOOTMODE_STRAPS))
get_recovery_mode_switch();
get_recovery_mode_switch();
/* Unmute */
ec_kbc_write_cmd(EC_KBD_CMD_UNMUTE);

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@ -119,8 +119,7 @@ void rcba_config(void)
static void early_ec_init(void)
{
u8 ec_status = ec_read(EC_STATUS_REG);
int rec_mode = IS_ENABLED(CONFIG_BOOTMODE_STRAPS) &&
get_recovery_mode_switch();
int rec_mode = get_recovery_mode_switch();
if (((ec_status & 0x3) == EC_IN_RO_MODE) ||
((ec_status & 0x3) == EC_IN_RECOVERY_MODE)) {

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@ -34,6 +34,7 @@
#include <symbols.h>
#include <vbe.h>
#include <vendorcode/google/chromeos/chromeos.h>
#include <vboot/vboot_common.h>
#include "board.h"
@ -90,7 +91,7 @@ static void mainboard_init(device_t dev)
/* If recovery mode is detected, reduce frequency and voltage to reduce
* heat in case machine is left unattended. chrome-os-partner:41201. */
if (recovery_mode_enabled()) {
if (vboot_recovery_mode_enabled()) {
printk(BIOS_DEBUG, "Reducing APLL freq for recovery mode.\n");
rkclk_configure_cpu(APLL_600_MHZ);
rk808_configure_buck(1, 900);

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@ -39,7 +39,7 @@ void fill_lb_gpios(struct lb_gpios *gpios)
{
struct lb_gpio chromeos_gpios[] = {
{-1, ACTIVE_HIGH, get_write_protect_state(), "write protect"},
{-1, ACTIVE_HIGH, recovery_mode_enabled(), "recovery"},
{-1, ACTIVE_HIGH, vboot_recovery_mode_enabled(), "recovery"},
{-1, ACTIVE_HIGH, get_developer_mode_switch(), "developer"},
{-1, ACTIVE_HIGH, get_lid_switch(), "lid"},
{-1, ACTIVE_HIGH, 0, "power"},

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@ -457,7 +457,7 @@ static void gma_func0_init(struct device *dev)
dp.panel_power_cycle_delay = conf->gpu_panel_power_cycle_delay;
#if IS_ENABLED(CONFIG_CHROMEOS)
init_fb = developer_mode_enabled() || recovery_mode_enabled();
init_fb = display_init_required();
#endif
lightup_ok = panel_lightup(&dp, init_fb);
gfx_set_init_done(1);

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@ -14,7 +14,6 @@
*/
#include <console/console.h>
#include <bootmode.h>
#include <string.h>
#include <arch/io.h>
#include <cbmem.h>
@ -25,6 +24,7 @@
#include <northbridge/intel/common/mrc_cache.h>
#include <pc80/mc146818rtc.h>
#include <device/pci_def.h>
#include <vboot/vboot_common.h>
#include "raminit.h"
#include "pei_data.h"
#include "haswell.h"
@ -121,7 +121,7 @@ void sdram_initialize(struct pei_data *pei_data)
* Do not pass MRC data in for recovery mode boot,
* Always pass it in for S3 resume.
*/
if (!recovery_mode_enabled() || pei_data->boot_mode == 2)
if (!vboot_recovery_mode_enabled() || pei_data->boot_mode == 2)
prepare_mrc_cache(pei_data);
/* If MRC data is not found we cannot continue S3 resume. */

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@ -200,7 +200,7 @@ void sdram_initialize(struct pei_data *pei_data)
* Do not pass MRC data in for recovery mode boot,
* Always pass it in for S3 resume.
*/
if (!recovery_mode_enabled() || pei_data->boot_mode == 2)
if (!vboot_recovery_mode_enabled() || pei_data->boot_mode == 2)
prepare_mrc_cache(pei_data);
/* If MRC data is not found we cannot continue S3 resume. */

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@ -16,7 +16,6 @@
#include <stddef.h>
#include <arch/acpi.h>
#include <arch/io.h>
#include <bootmode.h>
#include <cbfs.h>
#include <cbmem.h>
#include <console/console.h>
@ -31,6 +30,7 @@
#include <soc/romstage.h>
#include <ec/google/chromeec/ec.h>
#include <ec/google/chromeec/ec_commands.h>
#include <vboot/vboot_common.h>
static void reset_system(void)
{
@ -123,7 +123,7 @@ void raminit(struct mrc_params *mp, int prev_sleep_state)
if (!mp->io_hole_mb)
mp->io_hole_mb = 2048;
if (recovery_mode_enabled()) {
if (vboot_recovery_mode_enabled()) {
printk(BIOS_DEBUG, "Recovery mode: not using MRC cache.\n");
} else if (!mrc_cache_get_current(&cache)) {
mp->saved_data_size = cache->size;

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@ -487,8 +487,7 @@ static void igd_init(struct device *dev)
/* Wait for any configured pre-graphics delay */
if (!acpi_is_wakeup_s3()) {
#if IS_ENABLED(CONFIG_CHROMEOS)
if (developer_mode_enabled() || recovery_mode_enabled() ||
vboot_wants_oprom())
if (display_init_required() || vboot_wants_oprom())
mdelay(CONFIG_PRE_GRAPHICS_DELAY);
#else
mdelay(CONFIG_PRE_GRAPHICS_DELAY);

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@ -48,7 +48,7 @@ void raminit(struct pei_data *pei_data)
broadwell_fill_pei_data(pei_data);
if (recovery_mode_enabled()) {
if (vboot_recovery_mode_enabled()) {
/* Recovery mode does not use MRC cache */
printk(BIOS_DEBUG, "Recovery mode: not using MRC cache.\n");
} else if (!mrc_cache_get_current(&cache)) {

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@ -19,6 +19,8 @@
#include <cbmem.h>
#include <fmap.h>
#include <ip_checksum.h>
#include <vboot/vboot_common.h>
#include "mrc_cache.h"
#include "nvm.h"

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@ -91,8 +91,7 @@ static void igd_init(struct device *dev)
/* Wait for any configured pre-graphics delay */
if (!acpi_is_wakeup_s3()) {
#if IS_ENABLED(CONFIG_CHROMEOS)
if (developer_mode_enabled() || recovery_mode_enabled() ||
vboot_wants_oprom())
if (display_init_required() || vboot_wants_oprom())
mdelay(CONFIG_PRE_GRAPHICS_DELAY);
#else
mdelay(CONFIG_PRE_GRAPHICS_DELAY);

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@ -100,7 +100,7 @@ void soc_memory_init_params(struct romstage_params *params,
upd->IedSize = CONFIG_IED_REGION_SIZE;
upd->ProbelessTrace = config->ProbelessTrace;
upd->EnableTraceHub = config->EnableTraceHub;
if (recovery_mode_enabled())
if (vboot_recovery_mode_enabled())
upd->SaGv = 0; /* Disable SaGv in recovery mode. */
else
upd->SaGv = config->SaGv;

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@ -710,7 +710,7 @@ static void intel_me_init(device_t dev)
/*
* Unlock ME in recovery mode.
*/
if (recovery_mode_enabled()) {
if (vboot_recovery_mode_enabled()) {
/* Unlock ME flash region */
mkhi_hmrfpo_enable();

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@ -709,7 +709,7 @@ static void intel_me_init(device_t dev)
/*
* Unlock ME in recovery mode.
*/
if (recovery_mode_enabled()) {
if (vboot_recovery_mode_enabled()) {
/* Unlock ME flash region */
mkhi_hmrfpo_enable();

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@ -13,6 +13,14 @@
## GNU General Public License for more details.
##
bootblock-y += bootmode.c
romstage-y += bootmode.c
ramstage-y += bootmode.c
verstage-y += bootmode.c
postcar-y += bootmode.c
ifeq ($(CONFIG_VBOOT),y)
libverstage-generic-ccopts += -D__PRE_RAM__ -D__VERSTAGE__
verstage-generic-ccopts += -D__PRE_RAM__ -D__VERSTAGE__
@ -53,12 +61,6 @@ romstage-y += vboot_common.c
ramstage-y += vboot_common.c
postcar-y += vboot_common.c
bootblock-y += recovery.c
romstage-y += recovery.c
ramstage-y += recovery.c
verstage-y += recovery.c
postcar-y += recovery.c
bootblock-y += common.c
libverstage-y += vboot_logic.c
verstage-y += common.c
@ -141,3 +143,5 @@ regions-for-file = $(subst $(spc),$(comma),$(sort \
font.bin \
vbgfx.bin \
,$(1)),COREBOOT,COREBOOT FW_MAIN_A FW_MAIN_B)))
endif # CONFIG_VBOOT

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@ -89,6 +89,9 @@ static int cbmem_possibly_online(void)
*/
static int vboot_possibly_executed(void)
{
if (!IS_ENABLED(CONFIG_VBOOT))
return 0;
if (IS_ENABLED(CONFIG_VBOOT_STARTS_IN_BOOTBLOCK)) {
if (ENV_BOOTBLOCK && IS_ENABLED(CONFIG_SEPARATE_VERSTAGE))
return 0;
@ -150,3 +153,25 @@ int vboot_check_recovery_request(void)
return 0;
}
int vboot_recovery_mode_enabled(void)
{
if (!IS_ENABLED(CONFIG_VBOOT))
return 0;
return !!vboot_check_recovery_request();
}
int vboot_developer_mode_enabled(void)
{
if (!IS_ENABLED(CONFIG_VBOOT))
return 0;
if (get_developer_mode_switch())
return 1;
if (cbmem_possibly_online() && vboot_handoff_check_developer_flag())
return 1;
return 0;
}

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@ -101,4 +101,8 @@ void verstage_main(void);
void verstage(void);
void verstage_mainboard_init(void);
/* Check boot modes */
int vboot_developer_mode_enabled(void);
int vboot_recovery_mode_enabled(void);
#endif /* __VBOOT_VBOOT_COMMON_H__ */

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@ -25,7 +25,6 @@ config CHROMEOS
select TPM2 if MAINBOARD_HAS_TPM2
select TPM_INIT_FAILURE_IS_FATAL if PC80_SYSTEM && LPC_TPM
select SKIP_TPM_STARTUP_ON_NORMAL_BOOT if PC80_SYSTEM && LPC_TPM
select BOOTMODE_STRAPS
select ELOG if SPI_FLASH
select COLLECT_TIMESTAMPS
select VBOOT

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@ -25,10 +25,10 @@
void elog_add_boot_reason(void)
{
if (developer_mode_enabled()) {
if (vboot_developer_mode_enabled()) {
elog_add_event(ELOG_TYPE_CROS_DEVELOPER_MODE);
printk(BIOS_DEBUG, "%s: Logged dev mode boot\n", __func__);
} else if (recovery_mode_enabled()) {
} else if (vboot_recovery_mode_enabled()) {
u8 reason = 0;
#if CONFIG_VBOOT
struct vboot_handoff *vbho = cbmem_find(CBMEM_ID_VBOOT_HANDOFF);

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@ -53,10 +53,10 @@ void chromeos_init_vboot(chromeos_acpi_t *chromeos)
#endif
#if CONFIG_ELOG
if (developer_mode_enabled() ||
(vboot_wants_oprom() && !recovery_mode_enabled()))
if (vboot_developer_mode_enabled() ||
(vboot_wants_oprom() && !vboot_recovery_mode_enabled()))
elog_add_event(ELOG_TYPE_CROS_DEVELOPER_MODE);
if (recovery_mode_enabled()) {
if (vboot_recovery_mode_enabled()) {
int reason = get_recovery_mode_from_vbnv();
#if CONFIG_VBOOT
if (vboot_handoff && !reason) {