Trivial white space fixes so that the next patches are easier to read.
Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4268 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Myles Watson
parent
7c29dada3e
commit
032a9653a6
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@ -83,16 +83,16 @@ static void pci_domain_set_resources(device_t dev)
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for(rambits = 0, i = 0; i < ARRAY_SIZE(ramregs); i++) {
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unsigned char reg;
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reg = pci_read_config8(mc_dev, ramregs[i]);
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/* these are ENDING addresses, not sizes.
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/* these are ENDING addresses, not sizes.
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* if there is memory in this slot, then reg will be > rambits.
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* So we just take the max, that gives us total.
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* So we just take the max, that gives us total.
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* We take the highest one to cover for once and future coreboot
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* bugs. We warn about bugs.
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*/
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if (reg > rambits)
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rambits = reg;
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if (reg < rambits)
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printk_err("ERROR! register 0x%x is not set!\n",
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printk_err("ERROR! register 0x%x is not set!\n",
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ramregs[i]);
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}
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if (rambits == 0) {
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@ -104,11 +104,11 @@ static void pci_domain_set_resources(device_t dev)
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/* Compute the top of Low memory */
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tolmk = pci_tolm >> 10;
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if (tolmk >= tomk) {
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/* The PCI hole does not overlap memory.
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*/
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/* The PCI hole does not overlap the memory. */
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tolmk = tomk;
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}
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/* Report the memory regions */
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/* Report the memory regions. */
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idx = 10;
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ram_resource(dev, idx++, 0, tolmk);
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}
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@ -122,12 +122,12 @@ static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max)
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}
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static struct device_operations pci_domain_ops = {
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.read_resources = pci_domain_read_resources,
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.set_resources = pci_domain_set_resources,
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.enable_resources = enable_childrens_resources,
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.init = 0,
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.scan_bus = pci_domain_scan_bus,
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};
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.read_resources = pci_domain_read_resources,
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.set_resources = pci_domain_set_resources,
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.enable_resources = enable_childrens_resources,
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.init = 0,
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.scan_bus = pci_domain_scan_bus,
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};
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static void enable_dev(struct device *dev)
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{
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@ -17,10 +17,10 @@
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/*
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* (c) 1999--2000 Martin Mares <mj@suse.cz>
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*/
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/* lots of mods by ron minnich (rminnich@lanl.gov), with
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/* lots of mods by ron minnich (rminnich@lanl.gov), with
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* the final architecture guidance from Tom Merritt (tjm@codegen.com)
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* In particular, we changed from the one-pass original version to
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* Tom's recommended multiple-pass version. I wasn't sure about doing
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* In particular, we changed from the one-pass original version to
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* Tom's recommended multiple-pass version. I wasn't sure about doing
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* it with multiple passes, until I actually started doing it and saw
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* the wisdom of Tom's recommendations ...
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*
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@ -52,7 +52,7 @@ extern struct device **last_dev_p;
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/**
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* @brief Allocate a new device structure.
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*
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*
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* Allocte a new device structure and attached it to the device tree as a
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* child of the parent bus.
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*
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@ -69,7 +69,7 @@ device_t alloc_dev(struct bus *parent, struct device_path *path)
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device_t dev, child;
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int link;
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spin_lock(&dev_lock);
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spin_lock(&dev_lock);
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/* Find the last child of our parent */
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for(child = parent->children; child && child->sibling; ) {
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@ -111,7 +111,7 @@ device_t alloc_dev(struct bus *parent, struct device_path *path)
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}
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/**
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* @brief round a number up to an alignment.
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* @brief round a number up to an alignment.
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* @param val the starting value
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* @param roundup Alignment as a power of two
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* @returns rounded up number
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@ -158,7 +158,7 @@ static void read_resources(struct bus *bus)
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struct resource *resource;
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unsigned link;
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resource = &curdev->resource[i];
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if (!(resource->flags & IORESOURCE_SUBTRACTIVE))
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if (!(resource->flags & IORESOURCE_SUBTRACTIVE))
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continue;
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link = IOINDEX_SUBTRACTIVE_LINK(resource->index);
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if (link > MAX_LINKS) {
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@ -194,24 +194,23 @@ static void pick_largest_resource(void *gp,
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state->seen_last = 1;
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return;
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}
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if (resource->flags & IORESOURCE_FIXED ) return; //skip it
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if (last && (
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(last->align < resource->align) ||
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((last->align == resource->align) &&
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(last->size < resource->size)) ||
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((last->align == resource->align) &&
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(last->size == resource->size) &&
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(!state->seen_last)))) {
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if (resource->flags & IORESOURCE_FIXED)
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return; // Skip it.
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if (last && ((last->align < resource->align) ||
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((last->align == resource->align) &&
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(last->size < resource->size)) ||
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((last->align == resource->align) &&
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(last->size == resource->size) && (!state->seen_last)))) {
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return;
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}
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if (!state->result ||
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(state->result->align < resource->align) ||
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((state->result->align == resource->align) &&
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(state->result->size < resource->size)))
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if (!state->result ||
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(state->result->align < resource->align) ||
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((state->result->align == resource->align) &&
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(state->result->size < resource->size)))
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{
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state->result_dev = dev;
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state->result = resource;
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}
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}
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}
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static struct device *largest_resource(struct bus *bus, struct resource **result_res,
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@ -224,14 +223,15 @@ static struct device *largest_resource(struct bus *bus, struct resource **result
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state.result = 0;
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state.seen_last = 0;
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search_bus_resources(bus, type_mask, type, pick_largest_resource, &state);
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search_bus_resources(bus, type_mask, type, pick_largest_resource,
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&state);
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*result_res = state.result;
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return state.result_dev;
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}
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/* Compute allocate resources is the guts of the resource allocator.
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*
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*
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* The problem.
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* - Allocate resources locations for every device.
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* - Don't overlap, and follow the rules of bridges.
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@ -253,7 +253,7 @@ static struct device *largest_resource(struct bus *bus, struct resource **result
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* bridges. The first to see how large the resources are behind
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* the bridge, and what their alignment requirements are. The
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* second to assign a safe address to the devices behind the
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* bridge. This allows me to treat a bridge as just a device with
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* bridge. This allows me to treat a bridge as just a device with
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* a couple of resources, and not need to special case it in the
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* allocator. Also this allows handling of other types of bridges.
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*
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@ -272,7 +272,7 @@ void compute_allocate_resource(
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min_align = 0;
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base = bridge->base;
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printk_spew("%s compute_allocate_resource %s: base: %08Lx size: %08Lx align: %d gran: %d\n",
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printk_spew("%s compute_allocate_resource %s: base: %08Lx size: %08Lx align: %d gran: %d\n",
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dev_path(bus->dev),
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(bridge->flags & IORESOURCE_IO)? "io":
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(bridge->flags & IORESOURCE_PREFETCH)? "prefmem" : "mem",
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@ -295,7 +295,7 @@ void compute_allocate_resource(
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/* Remember I haven't found anything yet. */
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resource = 0;
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/* Walk through all the devices on the current bus and
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/* Walk through all the devices on the current bus and
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* compute the addresses.
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*/
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while((dev = largest_resource(bus, &resource, type_mask, type))) {
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@ -356,11 +356,11 @@ void compute_allocate_resource(
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resource->flags |= IORESOURCE_ASSIGNED;
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resource->flags &= ~IORESOURCE_STORED;
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base += size;
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printk_spew("%s %02lx * [0x%08Lx - 0x%08Lx] %s\n",
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dev_path(dev),
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resource->index,
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resource->base,
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resource->index,
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resource->base,
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resource->base + resource->size - 1,
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(resource->flags & IORESOURCE_IO)? "io":
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(resource->flags & IORESOURCE_PREFETCH)? "prefmem": "mem");
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@ -380,13 +380,11 @@ void compute_allocate_resource(
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*/
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bridge->size = round(base, bridge->gran) - bridge->base;
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printk_spew("%s compute_allocate_resource %s: base: %08Lx size: %08Lx align: %d gran: %d done\n",
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dev_path(bus->dev),
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(bridge->flags & IORESOURCE_IO)? "io":
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(bridge->flags & IORESOURCE_PREFETCH)? "prefmem" : "mem",
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base, bridge->size, bridge->align, bridge->gran);
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printk_spew("%s compute_allocate_resource %s: base: %08Lx size: %08Lx align: %d gran: %d done\n",
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dev_path(bus->dev),
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(bridge->flags & IORESOURCE_IO)? "io":
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(bridge->flags & IORESOURCE_PREFETCH)? "prefmem" : "mem",
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base, bridge->size, bridge->align, bridge->gran);
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}
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#if CONFIG_CONSOLE_VGA == 1
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@ -407,7 +405,7 @@ static void allocate_vga_resource(void)
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for(dev = all_devices; dev; dev = dev->next) {
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if (!dev->enabled) continue;
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if (((dev->class >> 16) == PCI_BASE_CLASS_DISPLAY) &&
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((dev->class >> 8) != PCI_CLASS_DISPLAY_OTHER))
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((dev->class >> 8) != PCI_CLASS_DISPLAY_OTHER))
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{
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if (!vga_first) {
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if (dev->on_mainboard) {
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@ -427,7 +425,7 @@ static void allocate_vga_resource(void)
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dev->command &= ~(PCI_COMMAND_MEMORY | PCI_COMMAND_IO);
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}
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}
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vga = vga_last;
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if(!vga) {
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@ -443,7 +441,7 @@ static void allocate_vga_resource(void)
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vga = vga_onboard;
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}
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if (vga) {
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/* vga is first add on card or the only onboard vga */
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printk_debug("Allocating VGA resource %s\n", dev_path(vga));
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@ -458,7 +456,7 @@ static void allocate_vga_resource(void)
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dev_path(bus->dev));
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bus->bridge_ctrl |= PCI_BRIDGE_CTL_VGA;
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bus = (bus == bus->dev->bus)? 0 : bus->dev->bus;
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}
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}
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}
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#endif
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@ -481,7 +479,7 @@ void assign_resources(struct bus *bus)
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{
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struct device *curdev;
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printk_spew("%s assign_resources, bus %d link: %d\n",
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printk_spew("%s assign_resources, bus %d link: %d\n",
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dev_path(bus->dev), bus->secondary, bus->link);
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for(curdev = bus->children; curdev; curdev = curdev->sibling) {
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@ -495,7 +493,7 @@ void assign_resources(struct bus *bus)
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}
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curdev->ops->set_resources(curdev);
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}
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printk_spew("%s assign_resources, bus %d link: %d\n",
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printk_spew("%s assign_resources, bus %d link: %d\n",
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dev_path(bus->dev), bus->secondary, bus->link);
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}
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@ -529,7 +527,7 @@ void enable_resources(struct device *dev)
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dev->ops->enable_resources(dev);
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}
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/**
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/**
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* @brief Reset all of the devices a bus
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*
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* Reset all of the devices on a bus and clear the bus's reset_needed flag.
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@ -550,11 +548,11 @@ int reset_bus(struct bus *bus)
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return 0;
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}
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/**
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/**
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* @brief Scan for devices on a bus.
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*
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* If there are bridges on the bus, recursively scan the buses behind the bridges.
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* If the setting up and tuning of the bus causes a reset to be required,
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* If the setting up and tuning of the bus causes a reset to be required,
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* reset the bus and scan it again.
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*
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* @param bus pointer to the bus device
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@ -612,7 +610,7 @@ unsigned int scan_bus(device_t bus, unsigned int max)
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* This function has no idea how to scan and probe buses and devices at all.
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* It depends on the bus/device specific scan_bus() method to do it. The
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* scan_bus() method also has to create the device structure and attach
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* it to the device tree.
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* it to the device tree.
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*/
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void dev_enumerate(void)
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{
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@ -633,7 +631,7 @@ void dev_enumerate(void)
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/**
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* @brief Configure devices on the devices tree.
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*
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*
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* Starting at the root of the device tree, travel it recursively in two
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* passes. In the first pass, we compute and allocate resources (ranges)
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* requried by each device. In the second pass, the resources ranges are
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@ -643,7 +641,7 @@ void dev_enumerate(void)
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* at DEVICE_MEM_HIGH and grow downward.
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*
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* Since the assignment is hierarchical we set the values into the dev_root
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* struct.
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* struct.
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*/
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void dev_configure(void)
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{
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@ -682,7 +680,7 @@ void dev_configure(void)
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#if CONFIG_CONSOLE_VGA == 1
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/* Allocate the VGA I/O resource.. */
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allocate_vga_resource();
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allocate_vga_resource();
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#endif
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/* Store the computed resource allocations into device registers ... */
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@ -726,8 +724,8 @@ void dev_initialize(void)
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printk_info("Initializing devices...\n");
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for(dev = all_devices; dev; dev = dev->next) {
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if (dev->enabled && !dev->initialized &&
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dev->ops && dev->ops->init)
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if (dev->enabled && !dev->initialized &&
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dev->ops && dev->ops->init)
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{
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if (dev->path.type == DEVICE_PATH_I2C) {
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printk_debug("smbus: %s[%d]->",
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@ -55,7 +55,7 @@ uint8_t pci_moving_config8(struct device *dev, unsigned reg)
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{
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uint8_t value, ones, zeroes;
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value = pci_read_config8(dev, reg);
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pci_write_config8(dev, reg, 0xff);
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ones = pci_read_config8(dev, reg);
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@ -71,7 +71,7 @@ uint16_t pci_moving_config16(struct device *dev, unsigned reg)
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{
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uint16_t value, ones, zeroes;
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value = pci_read_config16(dev, reg);
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pci_write_config16(dev, reg, 0xffff);
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ones = pci_read_config16(dev, reg);
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@ -87,7 +87,7 @@ uint32_t pci_moving_config32(struct device *dev, unsigned reg)
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{
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uint32_t value, ones, zeroes;
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value = pci_read_config32(dev, reg);
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pci_write_config32(dev, reg, 0xffffffff);
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ones = pci_read_config32(dev, reg);
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@ -146,7 +146,7 @@ unsigned pci_find_capability(device_t dev, unsigned cap)
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}
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/** Given a device and register, read the size of the BAR for that register.
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/** Given a device and register, read the size of the BAR for that register.
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* @param dev Pointer to the device structure
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* @param resource Pointer to the resource structure
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* @param index Address of the pci configuration register
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@ -176,7 +176,7 @@ struct resource *pci_get_resource(struct device *dev, unsigned long index)
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/* Find the high bits that move */
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moving |= ((resource_t)pci_moving_config32(dev, index + 4)) << 32;
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}
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/* Find the resource constraints.
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/* Find the resource constraints.
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*
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* Start by finding the bits that move. From there:
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* - Size is the least significant bit of the bits that move.
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@ -195,12 +195,12 @@ struct resource *pci_get_resource(struct device *dev, unsigned long index)
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resource->limit = limit = moving | (resource->size - 1);
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}
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/*
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* some broken hardware has read-only registers that do not
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* some broken hardware has read-only registers that do not
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* really size correctly.
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* Example: the acer m7229 has BARs 1-4 normally read-only.
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* Example: the acer m7229 has BARs 1-4 normally read-only.
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* so BAR1 at offset 0x10 reads 0x1f1. If you size that register
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* by writing 0xffffffff to it, it will read back as 0x1f1 -- a
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* violation of the spec.
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* by writing 0xffffffff to it, it will read back as 0x1f1 -- a
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* violation of the spec.
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* We catch this case and ignore it by observing which bits move,
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* This also catches the common case unimplemented registers
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* that always read back as 0.
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@ -219,7 +219,7 @@ struct resource *pci_get_resource(struct device *dev, unsigned long index)
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resource->flags |= IORESOURCE_IO;
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/* I don't want to deal with 32bit I/O resources */
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resource->limit = 0xffff;
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}
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}
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else {
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/* A Memory mapped base address */
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attr &= PCI_BASE_ADDRESS_MEM_ATTR_MASK;
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@ -290,7 +290,7 @@ static void pci_get_rom_resource(struct device *dev, unsigned long index)
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/* clear the Enable bit */
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||||
moving = moving & ~PCI_ROM_ADDRESS_ENABLE;
|
||||
|
||||
/* Find the resource constraints.
|
||||
/* Find the resource constraints.
|
||||
*
|
||||
* Start by finding the bits that move. From there:
|
||||
* - Size is the least significant bit of the bits that move.
|
||||
|
|
@ -325,12 +325,12 @@ static void pci_get_rom_resource(struct device *dev, unsigned long index)
|
|||
resource->base = dev->rom_address;
|
||||
resource->flags |= IORESOURCE_MEM | IORESOURCE_READONLY |
|
||||
IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
|
||||
}
|
||||
}
|
||||
|
||||
compact_resources(dev);
|
||||
}
|
||||
|
||||
/** Read the base address registers for a given device.
|
||||
/** Read the base address registers for a given device.
|
||||
* @param dev Pointer to the dev structure
|
||||
* @param howmany How many registers to read (6 for device, 2 for bridge)
|
||||
*/
|
||||
|
|
@ -405,7 +405,7 @@ static void pci_bridge_read_bases(struct device *dev)
|
|||
|
||||
/* Initialize the io space constraints on the current bus */
|
||||
pci_record_bridge_resource(
|
||||
dev, moving, PCI_IO_BASE,
|
||||
dev, moving, PCI_IO_BASE,
|
||||
IORESOURCE_IO, IORESOURCE_IO);
|
||||
|
||||
|
||||
|
|
@ -415,14 +415,14 @@ static void pci_bridge_read_bases(struct device *dev)
|
|||
|
||||
moving_limit = ((resource_t)pci_moving_config16(dev, PCI_PREF_MEMORY_LIMIT)) << 16;
|
||||
moving_limit |= ((resource_t)pci_moving_config32(dev, PCI_PREF_LIMIT_UPPER32)) << 32;
|
||||
|
||||
|
||||
moving = moving_base & moving_limit;
|
||||
/* Initiliaze the prefetchable memory constraints on the current bus */
|
||||
pci_record_bridge_resource(
|
||||
dev, moving, PCI_PREF_MEMORY_BASE,
|
||||
dev, moving, PCI_PREF_MEMORY_BASE,
|
||||
IORESOURCE_MEM | IORESOURCE_PREFETCH,
|
||||
IORESOURCE_MEM | IORESOURCE_PREFETCH);
|
||||
|
||||
|
||||
|
||||
/* See if the bridge mem resources are implemented */
|
||||
moving_base = ((uint32_t)pci_moving_config16(dev, PCI_MEMORY_BASE)) << 16;
|
||||
|
|
@ -432,7 +432,7 @@ static void pci_bridge_read_bases(struct device *dev)
|
|||
|
||||
/* Initialize the memory resources on the current bus */
|
||||
pci_record_bridge_resource(
|
||||
dev, moving, PCI_MEMORY_BASE,
|
||||
dev, moving, PCI_MEMORY_BASE,
|
||||
IORESOURCE_MEM | IORESOURCE_PREFETCH,
|
||||
IORESOURCE_MEM);
|
||||
|
||||
|
|
@ -496,13 +496,13 @@ static void pci_set_resource(struct device *dev, struct resource *resource)
|
|||
|
||||
/* Get the end */
|
||||
end = resource_end(resource);
|
||||
|
||||
|
||||
/* Now store the resource */
|
||||
resource->flags |= IORESOURCE_STORED;
|
||||
if (!(resource->flags & IORESOURCE_PCI_BRIDGE)) {
|
||||
unsigned long base_lo, base_hi;
|
||||
/*
|
||||
* some chipsets allow us to set/clear the IO bit.
|
||||
* some chipsets allow us to set/clear the IO bit.
|
||||
* (e.g. VIA 82c686a.) So set it to be safe)
|
||||
*/
|
||||
base_lo = base & 0xffffffff;
|
||||
|
|
@ -517,7 +517,7 @@ static void pci_set_resource(struct device *dev, struct resource *resource)
|
|||
}
|
||||
else if (resource->index == PCI_IO_BASE) {
|
||||
/* set the IO ranges */
|
||||
compute_allocate_resource(&dev->link[0], resource,
|
||||
compute_allocate_resource(&dev->link[0], resource,
|
||||
IORESOURCE_IO, IORESOURCE_IO);
|
||||
pci_write_config8(dev, PCI_IO_BASE, base >> 8);
|
||||
pci_write_config16(dev, PCI_IO_BASE_UPPER16, base >> 16);
|
||||
|
|
@ -527,7 +527,7 @@ static void pci_set_resource(struct device *dev, struct resource *resource)
|
|||
else if (resource->index == PCI_MEMORY_BASE) {
|
||||
/* set the memory range */
|
||||
compute_allocate_resource(&dev->link[0], resource,
|
||||
IORESOURCE_MEM | IORESOURCE_PREFETCH,
|
||||
IORESOURCE_MEM | IORESOURCE_PREFETCH,
|
||||
IORESOURCE_MEM);
|
||||
pci_write_config16(dev, PCI_MEMORY_BASE, base >> 16);
|
||||
pci_write_config16(dev, PCI_MEMORY_LIMIT, end >> 16);
|
||||
|
|
@ -535,7 +535,7 @@ static void pci_set_resource(struct device *dev, struct resource *resource)
|
|||
else if (resource->index == PCI_PREF_MEMORY_BASE) {
|
||||
/* set the prefetchable memory range */
|
||||
compute_allocate_resource(&dev->link[0], resource,
|
||||
IORESOURCE_MEM | IORESOURCE_PREFETCH,
|
||||
IORESOURCE_MEM | IORESOURCE_PREFETCH,
|
||||
IORESOURCE_MEM | IORESOURCE_PREFETCH);
|
||||
pci_write_config16(dev, PCI_PREF_MEMORY_BASE, base >> 16);
|
||||
pci_write_config32(dev, PCI_PREF_BASE_UPPER32, base >> 32);
|
||||
|
|
@ -597,10 +597,10 @@ void pci_dev_enable_resources(struct device *dev)
|
|||
ops = ops_pci(dev);
|
||||
if (dev->on_mainboard && ops && ops->set_subsystem) {
|
||||
printk_debug("%s subsystem <- %02x/%02x\n",
|
||||
dev_path(dev),
|
||||
dev_path(dev),
|
||||
MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID,
|
||||
MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID);
|
||||
ops->set_subsystem(dev,
|
||||
ops->set_subsystem(dev,
|
||||
MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID,
|
||||
MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID);
|
||||
}
|
||||
|
|
@ -642,7 +642,7 @@ void pci_bus_reset(struct bus *bus)
|
|||
|
||||
void pci_dev_set_subsystem(device_t dev, unsigned vendor, unsigned device)
|
||||
{
|
||||
pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID,
|
||||
pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID,
|
||||
((device & 0xffff) << 16) | (vendor & 0xffff));
|
||||
}
|
||||
|
||||
|
|
@ -722,12 +722,12 @@ struct device_operations default_pci_ops_bus = {
|
|||
* to figure out the type of downstream bridge. PCI-X
|
||||
* PCI-E, and Hypertransport all seem to have appropriate
|
||||
* capabilities.
|
||||
*
|
||||
*
|
||||
* When only a PCI-Express capability is found the type
|
||||
* is examined to see which type of bridge we have.
|
||||
*
|
||||
* @param dev
|
||||
*
|
||||
*
|
||||
* @return appropriate bridge operations
|
||||
*/
|
||||
static struct device_operations *get_pci_bridge_ops(device_t dev)
|
||||
|
|
@ -751,7 +751,7 @@ static struct device_operations *get_pci_bridge_ops(device_t dev)
|
|||
flags = pci_read_config16(dev, pos + PCI_CAP_FLAGS);
|
||||
if ((flags >> 13) == 1) {
|
||||
/* Host or Secondary Interface */
|
||||
printk_debug("%s subbordinate bus Hypertransport\n",
|
||||
printk_debug("%s subbordinate bus Hypertransport\n",
|
||||
dev_path(dev));
|
||||
return &default_ht_ops_bus;
|
||||
}
|
||||
|
|
@ -766,11 +766,11 @@ static struct device_operations *get_pci_bridge_ops(device_t dev)
|
|||
case PCI_EXP_TYPE_ROOT_PORT:
|
||||
case PCI_EXP_TYPE_UPSTREAM:
|
||||
case PCI_EXP_TYPE_DOWNSTREAM:
|
||||
printk_debug("%s subbordinate bus PCI Express\n",
|
||||
printk_debug("%s subbordinate bus PCI Express\n",
|
||||
dev_path(dev));
|
||||
return &default_pciexp_ops_bus;
|
||||
case PCI_EXP_TYPE_PCI_BRIDGE:
|
||||
printk_debug("%s subbordinate PCI\n",
|
||||
printk_debug("%s subbordinate PCI\n",
|
||||
dev_path(dev));
|
||||
return &default_pci_ops_bus;
|
||||
default:
|
||||
|
|
@ -785,7 +785,7 @@ static struct device_operations *get_pci_bridge_ops(device_t dev)
|
|||
* @brief Set up PCI device operation
|
||||
*
|
||||
*
|
||||
* @param dev
|
||||
* @param dev
|
||||
*
|
||||
* @see pci_drivers
|
||||
*/
|
||||
|
|
@ -797,14 +797,14 @@ static void set_pci_ops(struct device *dev)
|
|||
}
|
||||
|
||||
/* Look through the list of setup drivers and find one for
|
||||
* this pci device
|
||||
* this pci device
|
||||
*/
|
||||
for(driver = &pci_drivers[0]; driver != &epci_drivers[0]; driver++) {
|
||||
if ((driver->vendor == dev->vendor) &&
|
||||
(driver->device == dev->device))
|
||||
(driver->device == dev->device))
|
||||
{
|
||||
dev->ops = driver->ops;
|
||||
printk_spew("%s [%04x/%04x] %sops\n",
|
||||
printk_spew("%s [%04x/%04x] %sops\n",
|
||||
dev_path(dev),
|
||||
driver->vendor, driver->device,
|
||||
(driver->ops->scan_bus?"bus ":""));
|
||||
|
|
@ -835,7 +835,7 @@ static void set_pci_ops(struct device *dev)
|
|||
printk_err("%s [%04x/%04x/%06x] has unknown header "
|
||||
"type %02x, ignoring.\n",
|
||||
dev_path(dev),
|
||||
dev->vendor, dev->device,
|
||||
dev->vendor, dev->device,
|
||||
dev->class >> 8, dev->hdr_type);
|
||||
}
|
||||
}
|
||||
|
|
@ -875,9 +875,9 @@ static struct device *pci_scan_get_dev(struct device **list, unsigned int devfn)
|
|||
break;
|
||||
}
|
||||
}
|
||||
/* Just like alloc_dev add the device to the list of device on the bus.
|
||||
* When the list of devices was formed we removed all of the parents
|
||||
* children, and now we are interleaving static and dynamic devices in
|
||||
/* Just like alloc_dev add the device to the list of device on the bus.
|
||||
* When the list of devices was formed we removed all of the parents
|
||||
* children, and now we are interleaving static and dynamic devices in
|
||||
* order on the bus.
|
||||
*/
|
||||
if (dev) {
|
||||
|
|
@ -897,7 +897,7 @@ static struct device *pci_scan_get_dev(struct device **list, unsigned int devfn)
|
|||
return dev;
|
||||
}
|
||||
|
||||
/**
|
||||
/**
|
||||
* @brief Scan a PCI bus.
|
||||
*
|
||||
* Determine the existence of a given PCI device.
|
||||
|
|
@ -936,13 +936,13 @@ device_t pci_probe_dev(device_t dev, struct bus *bus, unsigned devfn)
|
|||
* found the device specific operations this
|
||||
* operations we will disable the device with
|
||||
* those as well.
|
||||
*
|
||||
*
|
||||
* This is geared toward devices that have subfunctions
|
||||
* that do not show up by default.
|
||||
*
|
||||
*
|
||||
* If a device is a stuff option on the motherboard
|
||||
* it may be absent and enable_dev must cope.
|
||||
*
|
||||
*
|
||||
*/
|
||||
/* Run the magice enable sequence for the device */
|
||||
if (dev->chip_ops && dev->chip_ops->enable_dev) {
|
||||
|
|
@ -950,8 +950,8 @@ device_t pci_probe_dev(device_t dev, struct bus *bus, unsigned devfn)
|
|||
}
|
||||
/* Now read the vendor and device id */
|
||||
id = pci_read_config32(dev, PCI_VENDOR_ID);
|
||||
|
||||
|
||||
|
||||
|
||||
/* If the device does not have a pci id disable it.
|
||||
* Possibly this is because we have already disabled
|
||||
* the device. But this also handles optional devices
|
||||
|
|
@ -959,7 +959,7 @@ device_t pci_probe_dev(device_t dev, struct bus *bus, unsigned devfn)
|
|||
*/
|
||||
/* If the chain is fully enumerated quit */
|
||||
if ( (id == 0xffffffff) || (id == 0x00000000) ||
|
||||
(id == 0x0000ffff) || (id == 0xffff0000))
|
||||
(id == 0x0000ffff) || (id == 0xffff0000))
|
||||
{
|
||||
if (dev->enabled) {
|
||||
printk_info("Disabling static device: %s\n",
|
||||
|
|
@ -972,14 +972,14 @@ device_t pci_probe_dev(device_t dev, struct bus *bus, unsigned devfn)
|
|||
/* Read the rest of the pci configuration information */
|
||||
hdr_type = pci_read_config8(dev, PCI_HEADER_TYPE);
|
||||
class = pci_read_config32(dev, PCI_CLASS_REVISION);
|
||||
|
||||
|
||||
/* Store the interesting information in the device structure */
|
||||
dev->vendor = id & 0xffff;
|
||||
dev->device = (id >> 16) & 0xffff;
|
||||
dev->hdr_type = hdr_type;
|
||||
/* class code, the upper 3 bytes of PCI_CLASS_REVISION */
|
||||
dev->class = class >> 8;
|
||||
|
||||
|
||||
|
||||
/* Architectural/System devices always need to
|
||||
* be bus masters.
|
||||
|
|
@ -987,7 +987,7 @@ device_t pci_probe_dev(device_t dev, struct bus *bus, unsigned devfn)
|
|||
if ((dev->class >> 16) == PCI_BASE_CLASS_SYSTEM) {
|
||||
dev->command |= PCI_COMMAND_MASTER;
|
||||
}
|
||||
/* Look at the vendor and device id, or at least the
|
||||
/* Look at the vendor and device id, or at least the
|
||||
* header type and class and figure out which set of
|
||||
* configuration methods to use. Unless we already
|
||||
* have some pci ops.
|
||||
|
|
@ -998,14 +998,14 @@ device_t pci_probe_dev(device_t dev, struct bus *bus, unsigned devfn)
|
|||
if (dev->ops && dev->ops->enable) {
|
||||
dev->ops->enable(dev);
|
||||
}
|
||||
|
||||
|
||||
|
||||
/* Display the device and error if we don't have some pci operations
|
||||
* for it.
|
||||
*/
|
||||
printk_debug("%s [%04x/%04x] %s%s\n",
|
||||
dev_path(dev),
|
||||
dev->vendor, dev->device,
|
||||
dev->vendor, dev->device,
|
||||
dev->enabled?"enabled": "disabled",
|
||||
dev->ops?"" : " No operations"
|
||||
);
|
||||
|
|
@ -1013,7 +1013,7 @@ device_t pci_probe_dev(device_t dev, struct bus *bus, unsigned devfn)
|
|||
return dev;
|
||||
}
|
||||
|
||||
/**
|
||||
/**
|
||||
* @brief Scan a PCI bus.
|
||||
*
|
||||
* Determine the existence of devices and bridges on a PCI bus. If there are
|
||||
|
|
@ -1059,14 +1059,14 @@ unsigned int pci_scan_bus(struct bus *bus,
|
|||
/* See if a device is present and setup the device
|
||||
* structure.
|
||||
*/
|
||||
dev = pci_probe_dev(dev, bus, devfn);
|
||||
dev = pci_probe_dev(dev, bus, devfn);
|
||||
|
||||
/* if this is not a multi function device,
|
||||
/* if this is not a multi function device,
|
||||
* or the device is not present don't waste
|
||||
* time probing another function.
|
||||
* Skip to next device.
|
||||
* time probing another function.
|
||||
* Skip to next device.
|
||||
*/
|
||||
if ((PCI_FUNC(devfn) == 0x00) &&
|
||||
if ((PCI_FUNC(devfn) == 0x00) &&
|
||||
(!dev || (dev->enabled && ((dev->hdr_type & 0x80) != 0x80))))
|
||||
{
|
||||
devfn += 0x07;
|
||||
|
|
@ -1074,7 +1074,7 @@ unsigned int pci_scan_bus(struct bus *bus,
|
|||
}
|
||||
post_code(0x25);
|
||||
|
||||
/* Die if any left over static devices are are found.
|
||||
/* Die if any left over static devices are are found.
|
||||
* There's probably a problem in the Config.lb.
|
||||
*/
|
||||
if(old_devices) {
|
||||
|
|
@ -1118,8 +1118,8 @@ unsigned int pci_scan_bus(struct bus *bus,
|
|||
*
|
||||
* @return The maximum bus number found, after scanning all subordinate busses
|
||||
*/
|
||||
unsigned int do_pci_scan_bridge(struct device *dev, unsigned int max,
|
||||
unsigned int (*do_scan_bus)(struct bus *bus,
|
||||
unsigned int do_pci_scan_bridge(struct device *dev, unsigned int max,
|
||||
unsigned int (*do_scan_bus)(struct bus *bus,
|
||||
unsigned min_devfn, unsigned max_devfn, unsigned int max))
|
||||
{
|
||||
struct bus *bus;
|
||||
|
|
@ -1134,7 +1134,7 @@ unsigned int do_pci_scan_bridge(struct device *dev, unsigned int max,
|
|||
|
||||
/* Set up the primary, secondary and subordinate bus numbers. We have
|
||||
* no idea how many buses are behind this bridge yet, so we set the
|
||||
* subordinate bus number to 0xff for the moment.
|
||||
* subordinate bus number to 0xff for the moment.
|
||||
*/
|
||||
bus->secondary = ++max;
|
||||
bus->subordinate = 0xff;
|
||||
|
|
@ -1160,7 +1160,7 @@ unsigned int do_pci_scan_bridge(struct device *dev, unsigned int max,
|
|||
((unsigned int) (bus->subordinate) << 16));
|
||||
pci_write_config32(dev, PCI_PRIMARY_BUS, buses);
|
||||
|
||||
/* Now we can scan all subordinate buses
|
||||
/* Now we can scan all subordinate buses
|
||||
* i.e. the bus behind the bridge.
|
||||
*/
|
||||
max = do_scan_bus(bus, 0x00, 0xff, max);
|
||||
|
|
@ -1173,7 +1173,7 @@ unsigned int do_pci_scan_bridge(struct device *dev, unsigned int max,
|
|||
((unsigned int) (bus->subordinate) << 16);
|
||||
pci_write_config32(dev, PCI_PRIMARY_BUS, buses);
|
||||
pci_write_config16(dev, PCI_COMMAND, cr);
|
||||
|
||||
|
||||
printk_spew("%s returns max %d\n", __func__, max);
|
||||
return max;
|
||||
}
|
||||
|
|
@ -1231,10 +1231,10 @@ void pci_level_irq(unsigned char intNum)
|
|||
the indicated device address. If the device does not exist or does
|
||||
not require interrupts then this function has no effect.
|
||||
|
||||
This function should be called for each PCI slot in your system.
|
||||
This function should be called for each PCI slot in your system.
|
||||
|
||||
pIntAtoD is an array of IRQ #s that are assigned to PINTA through PINTD of
|
||||
this slot.
|
||||
this slot.
|
||||
The particular irq #s that are passed in depend on the routing inside
|
||||
your southbridge and on your motherboard.
|
||||
|
||||
|
|
@ -1256,7 +1256,7 @@ void pci_assign_irqs(unsigned bus, unsigned slot,
|
|||
if (pdev) {
|
||||
line = pci_read_config8(pdev, PCI_INTERRUPT_PIN);
|
||||
|
||||
// PCI spec says all other values are reserved
|
||||
// PCI spec says all other values are reserved
|
||||
if ((line >= 1) && (line <= 4)) {
|
||||
irq = pIntAtoD[line - 1];
|
||||
|
||||
|
|
|
|||
|
|
@ -13,7 +13,7 @@
|
|||
#include "northbridge.h"
|
||||
#include "i440bx.h"
|
||||
|
||||
static void northbridge_init(device_t dev)
|
||||
static void northbridge_init(device_t dev)
|
||||
{
|
||||
printk_spew("Northbridge Init\n");
|
||||
}
|
||||
|
|
@ -30,7 +30,7 @@ static struct device_operations northbridge_operations = {
|
|||
static const struct pci_driver northbridge_driver __pci_driver = {
|
||||
.ops = &northbridge_operations,
|
||||
.vendor = PCI_VENDOR_ID_INTEL,
|
||||
.device = 0x7190,
|
||||
.device = 0x7190,
|
||||
};
|
||||
|
||||
|
||||
|
|
@ -38,33 +38,32 @@ static const struct pci_driver northbridge_driver __pci_driver = {
|
|||
|
||||
static void pci_domain_read_resources(device_t dev)
|
||||
{
|
||||
struct resource *resource;
|
||||
unsigned reg;
|
||||
struct resource *resource;
|
||||
|
||||
/* Initialize the system wide io space constraints */
|
||||
resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0));
|
||||
resource->limit = 0xffffUL;
|
||||
resource->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
|
||||
/* Initialize the system wide io space constraints */
|
||||
resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0,0));
|
||||
resource->limit = 0xffffUL;
|
||||
resource->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
|
||||
|
||||
/* Initialize the system wide memory resources constraints */
|
||||
resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0));
|
||||
resource->limit = 0xffffffffULL;
|
||||
resource->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
|
||||
/* Initialize the system wide memory resources constraints */
|
||||
resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1,0));
|
||||
resource->limit = 0xffffffffULL;
|
||||
resource->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
|
||||
}
|
||||
|
||||
static void ram_resource(device_t dev, unsigned long index,
|
||||
unsigned long basek, unsigned long sizek)
|
||||
unsigned long basek, unsigned long sizek)
|
||||
{
|
||||
struct resource *resource;
|
||||
struct resource *resource;
|
||||
|
||||
if (!sizek) {
|
||||
return;
|
||||
}
|
||||
resource = new_resource(dev, index);
|
||||
resource->base = ((resource_t)basek) << 10;
|
||||
resource->size = ((resource_t)sizek) << 10;
|
||||
resource->flags = IORESOURCE_MEM | IORESOURCE_CACHEABLE | \
|
||||
IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED;
|
||||
if (!sizek) {
|
||||
return;
|
||||
}
|
||||
resource = new_resource(dev, index);
|
||||
resource->base = ((resource_t)basek) << 10;
|
||||
resource->size = ((resource_t)sizek) << 10;
|
||||
resource->flags = IORESOURCE_MEM | IORESOURCE_CACHEABLE | \
|
||||
IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED;
|
||||
}
|
||||
|
||||
static void tolm_test(void *gp, struct device *dev, struct resource *new)
|
||||
|
|
@ -95,6 +94,7 @@ static uint32_t find_pci_tolm(struct bus *bus)
|
|||
#define HIGH_TABLES_SIZE 64 // maximum size of high tables in KB
|
||||
extern uint64_t high_tables_base, high_tables_size;
|
||||
#endif
|
||||
|
||||
static void pci_domain_set_resources(device_t dev)
|
||||
{
|
||||
device_t mc_dev;
|
||||
|
|
@ -102,7 +102,6 @@ static void pci_domain_set_resources(device_t dev)
|
|||
|
||||
pci_tolm = find_pci_tolm(&dev->link[0]);
|
||||
mc_dev = dev->link[0].children;
|
||||
|
||||
if (mc_dev) {
|
||||
uint16_t tolm_r;
|
||||
unsigned long tomk, tolmk;
|
||||
|
|
@ -123,7 +122,7 @@ static void pci_domain_set_resources(device_t dev)
|
|||
tolmk = pci_tolm / 1024;
|
||||
|
||||
if (tolmk >= tomk) {
|
||||
/* The PCI hole does does not overlap the memory. */
|
||||
/* The PCI hole does not overlap the memory. */
|
||||
tolmk = tomk;
|
||||
}
|
||||
|
||||
|
|
@ -131,34 +130,33 @@ static void pci_domain_set_resources(device_t dev)
|
|||
idx = 10;
|
||||
ram_resource(dev, idx++, 0, 640);
|
||||
ram_resource(dev, idx++, 768, tolmk - 768);
|
||||
|
||||
|
||||
#if HAVE_HIGH_TABLES==1
|
||||
/* Leave some space for ACPI, PIRQ and MP tables */
|
||||
high_tables_base = (tomk - HIGH_TABLES_SIZE) * 1024;
|
||||
high_tables_size = HIGH_TABLES_SIZE * 1024;
|
||||
#endif
|
||||
}
|
||||
|
||||
assign_resources(&dev->link[0]);
|
||||
}
|
||||
|
||||
static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max)
|
||||
{
|
||||
max = pci_scan_bus(&dev->link[0], PCI_DEVFN(0, 0), 0xff, max);
|
||||
return max;
|
||||
max = pci_scan_bus(&dev->link[0], PCI_DEVFN(0, 0), 0xff, max);
|
||||
return max;
|
||||
}
|
||||
|
||||
static struct device_operations pci_domain_ops = {
|
||||
.read_resources = pci_domain_read_resources,
|
||||
.set_resources = pci_domain_set_resources,
|
||||
.enable_resources = enable_childrens_resources,
|
||||
.init = 0,
|
||||
.scan_bus = pci_domain_scan_bus,
|
||||
};
|
||||
.read_resources = pci_domain_read_resources,
|
||||
.set_resources = pci_domain_set_resources,
|
||||
.enable_resources = enable_childrens_resources,
|
||||
.init = 0,
|
||||
.scan_bus = pci_domain_scan_bus,
|
||||
};
|
||||
|
||||
static void cpu_bus_init(device_t dev)
|
||||
{
|
||||
initialize_cpus(&dev->link[0]);
|
||||
initialize_cpus(&dev->link[0]);
|
||||
}
|
||||
|
||||
static void cpu_bus_noop(device_t dev)
|
||||
|
|
@ -166,25 +164,23 @@ static void cpu_bus_noop(device_t dev)
|
|||
}
|
||||
|
||||
static struct device_operations cpu_bus_ops = {
|
||||
.read_resources = cpu_bus_noop,
|
||||
.set_resources = cpu_bus_noop,
|
||||
.enable_resources = cpu_bus_noop,
|
||||
.init = cpu_bus_init,
|
||||
.scan_bus = 0,
|
||||
.read_resources = cpu_bus_noop,
|
||||
.set_resources = cpu_bus_noop,
|
||||
.enable_resources = cpu_bus_noop,
|
||||
.init = cpu_bus_init,
|
||||
.scan_bus = 0,
|
||||
};
|
||||
|
||||
static void enable_dev(struct device *dev)
|
||||
{
|
||||
struct device_path path;
|
||||
|
||||
/* Set the operations if it is a special bus type */
|
||||
if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) {
|
||||
dev->ops = &pci_domain_ops;
|
||||
/* Set the operations if it is a special bus type */
|
||||
if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) {
|
||||
dev->ops = &pci_domain_ops;
|
||||
pci_set_method(dev);
|
||||
}
|
||||
else if (dev->path.type == DEVICE_PATH_APIC_CLUSTER) {
|
||||
dev->ops = &cpu_bus_ops;
|
||||
}
|
||||
}
|
||||
else if (dev->path.type == DEVICE_PATH_APIC_CLUSTER) {
|
||||
dev->ops = &cpu_bus_ops;
|
||||
}
|
||||
}
|
||||
|
||||
struct chip_operations northbridge_intel_i440bx_ops = {
|
||||
|
|
|
|||
Loading…
Reference in New Issue