roda/rk9: Consolidate `acpi/platform.asl`
The ASL code is already present in
`southbridge/intel/common/acpi/platform.asl` and
`cpu/intel/common/acpi/cpu.asl`.
So include these files instead of duplicating the code.
Something similar was don in commit commit 24813c14 (i945: Consolidate
acpi/platform.asl).
Change-Id: Ifb434db1b8eb01acf48f26366c5237ae49a8730a
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: http://review.coreboot.org/11884
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Paul Menzel
Patrick Georgi
parent
bb1b259184
commit
035926c0a6
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@ -18,48 +18,6 @@
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* Foundation, Inc.
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*/
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/* These come from the dynamically created CPU SSDT */
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External(PDC0)
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External(PDC1)
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/* The APM port can be used for generating software SMIs */
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OperationRegion (APMP, SystemIO, 0xb2, 2)
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Field (APMP, ByteAcc, NoLock, Preserve)
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{
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APMC, 8, // APM command
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APMS, 8 // APM status
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}
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/* Port 80 POST */
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OperationRegion (POST, SystemIO, 0x80, 1)
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Field (POST, ByteAcc, Lock, Preserve)
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{
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DBG0, 8
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}
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/* SMI I/O Trap */
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Method(TRAP, 1, Serialized)
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{
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Store (Arg0, SMIF) // SMI Function
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Store (0, TRP0) // Generate trap
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Return (SMIF) // Return value of SMI handler
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}
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/* The _PIC method is called by the OS to choose between interrupt
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* routing via the i8259 interrupt controller or the APIC.
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*
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* _PIC is called with a parameter of 0 for i8259 configuration and
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* with a parameter of 1 for Local Apic/IOAPIC configuration.
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*/
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Method(_PIC, 1)
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{
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// Remember the OS' IRQ routing choice.
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Store(Arg0, PICM)
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}
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/* The _PTS method (Prepare To Sleep) is called before the OS is
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* entering a sleep state. The sleep state number is passed in Arg0
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*/
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@ -97,42 +55,6 @@ Method(_WAK,1)
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Return(Package(){0,0})
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}
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// Power notification
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External (\_PR_.CP00, DeviceObj)
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External (\_PR_.CP01, DeviceObj)
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Method (PNOT)
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{
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If (MPEN) {
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If(And(PDC0, 0x08)) {
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Notify (\_PR_.CP00, 0x80) // _PPC
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If (And(PDC0, 0x10)) {
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Sleep(100)
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Notify(\_PR_.CP00, 0x81) // _CST
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}
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}
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If(And(PDC1, 0x08)) {
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Notify (\_PR_.CP01, 0x80) // _PPC
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If (And(PDC1, 0x10)) {
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Sleep(100)
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Notify(\_PR_.CP01, 0x81) // _CST
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}
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}
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} Else { // UP
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Notify (\_PR_.CP00, 0x80)
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Sleep(0x64)
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Notify(\_PR_.CP00, 0x81)
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}
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// Notify the Batteries
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Notify(BAT1, 0x80) // Execute BAT1 _BST
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Notify(BAT2, 0x80) // Execute BAT2 _BST
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}
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/* System Bus */
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Scope(\_SB)
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@ -149,49 +71,7 @@ Scope(\_SB)
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// TRAP(71) // TODO
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/* Determine the Operating System and save the value in OSYS.
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* We have to do this in order to be able to work around
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* certain windows bugs.
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*
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* OSYS value | Operating System
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* -----------+------------------
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* 2000 | Windows 2000
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* 2001 | Windows XP(+SP1)
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* 2002 | Windows XP SP2
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* 2006 | Windows Vista
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* ???? | Windows 7
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*/
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/* Let's assume we're running at least Windows 2000 */
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Store (2000, OSYS)
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If (CondRefOf(_OSI, Local0)) {
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/* Linux answers _OSI with "True" for a couple of
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* Windows version queries. But unlike Windows it
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* needs a Video repost, so let's determine whether
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* we're running Linux.
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*/
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If (_OSI("Linux")) {
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Store (1, LINX)
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}
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If (_OSI("Windows 2001")) {
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Store (2001, OSYS)
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}
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If (_OSI("Windows 2001 SP1")) {
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Store (2001, OSYS)
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}
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If (_OSI("Windows 2001 SP2")) {
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Store (2002, OSYS)
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}
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If (_OSI("Windows 2006")) {
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Store (2006, OSYS)
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}
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}
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\GOS()
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/* And the OS workarounds start right after we know what we're
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* running: Windows XP SP1 needs to have C-State coordination
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@ -34,6 +34,7 @@ DefinitionBlock(
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// global NVS and variables
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#include <southbridge/intel/i82801ix/acpi/globalnvs.asl>
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#include <southbridge/intel/common/acpi/platform.asl>
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// General Purpose Events
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#include "acpi/gpe.asl"
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@ -41,6 +42,8 @@ DefinitionBlock(
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// mainboard specific devices
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#include "acpi/mainboard.asl"
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#include <cpu/intel/common/acpi/cpu.asl>
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// Thermal Zone
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#include "acpi/thermal.asl"
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