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soc/intel/tigerlake/acpi: Update camera_clock_ctl.asl to ASL2.0 

This change updates camera_clock_ctl.asl to use ASL2.0 syntax. This
increases the readability of the ASL code.

BUG=none
BRANCH=none
TEST="BUILD for volteer"

Signed-off-by: Venkata Krishna Nimmagadda <venkata.krishna.nimmagadda@intel.com>
Change-Id: I6370e4b268331bfba5bc0392f27c560836b6ea72
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41798
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
This commit is contained in:
Venkata Krishna Nimmagadda 2020-05-27 14:20:21 -07:00 committed by Subrata Banik
parent 5694342a81
commit 03a05b47e0
1 changed files with 1 additions and 2 deletions
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src/soc/intel/tigerlake/acpi/camera_clock_ctl.asl
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@ -11,8 +11,7 @@ Scope (\_SB.PCI0) {
/* IsCLK PCH base register for clock settings */ /* IsCLK PCH base register for clock settings */
Name (ICKB, 0) Name (ICKB, 0)
Store (PCRB (PID_ISCLK) + R_ICLK_PCR_CAMERA1, ICKB) ICKB = PCRB (PID_ISCLK) + R_ICLK_PCR_CAMERA1
/* /*
* Arg0 : Clock Number * Arg0 : Clock Number
* Return : Offset of register to control the clock in Arg0 * Return : Offset of register to control the clock in Arg0